[llvm-commits] [llvm] r128897 - in /llvm/trunk: lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp test/MC/ARM/simple-encoding.ll test/MC/Disassembler/ARM/arm-tests.txt
Johnny Chen
johnny.chen at apple.com
Tue Apr 5 12:09:07 PDT 2011
Fixed in http://llvm.org/viewvc/llvm-project?view=rev&revision=128906.
Sorry about that.
On Apr 5, 2011, at 11:54 AM, Bob Wilson wrote:
> This is breaking a bunch of tests for me:
>
> Failing Tests (6):
> LLVM :: CodeGen/ARM/constants.ll
> LLVM :: CodeGen/ARM/fp.ll
> LLVM :: CodeGen/ARM/long.ll
> LLVM :: CodeGen/ARM/select-imm.ll
> LLVM :: CodeGen/ARM/select_xform.ll
> LLVM :: CodeGen/ARM/sub.ll
>
> Please fix or revert ASAP.
>
> On Apr 5, 2011, at 11:02 AM, Johnny Chen wrote:
>
>> Author: johnny
>> Date: Tue Apr 5 13:02:46 2011
>> New Revision: 128897
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=128897&view=rev
>> Log:
>> Constants with multiple encodings (ARM):
>> An alternative syntax is available for a modified immediate constant that permits the programmer to specify
>> the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:
>>
>> <byte> is the numeric value of abcdefgh, in the range 0-255
>> <rot> is twice the numeric value of rotation, an even number in the range 0-30.
>>
>> Modified:
>> llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
>> llvm/trunk/test/MC/ARM/simple-encoding.ll
>> llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
>>
>> Modified: llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp Tue Apr 5 13:02:46 2011
>> @@ -136,9 +136,10 @@
>> unsigned Rot = ARM_AM::getSOImmValRot(V);
>>
>> // Print low-level immediate formation info, per
>> - // A5.1.3: "Data-processing operands - Immediate".
>> + // A5.2.3: Data-processing (immediate), and
>> + // A5.2.4: Modified immediate constants in ARM instructions
>> if (Rot) {
>> - O << "#" << Imm << ", " << Rot;
>> + O << "#" << Imm << ", #" << Rot;
>> // Pretty printed version.
>> if (CommentStream)
>> *CommentStream << (int)ARM_AM::rotr32(Imm, Rot) << "\n";
>>
>> Modified: llvm/trunk/test/MC/ARM/simple-encoding.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/simple-encoding.ll?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/ARM/simple-encoding.ll (original)
>> +++ llvm/trunk/test/MC/ARM/simple-encoding.ll Tue Apr 5 13:02:46 2011
>> @@ -39,7 +39,7 @@
>>
>> define i32 @f4(i32 %a, i32 %b) {
>> ; CHECK: f4
>> -; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2]
>> +; CHECK: add r0, r0, #254, #28 @ encoding: [0xfe,0x0e,0x80,0xe2]
>> ; CHECK: @ 4064
>> ; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1]
>> %add = add nsw i32 %a, 4064
>> @@ -118,7 +118,7 @@
>> define i64 @f13() {
>> ; CHECK: f13:
>> ; CHECK: mvn r0, #0 @ encoding: [0x00,0x00,0xe0,0xe3]
>> -; CHECK: mvn r1, #2, 2 @ encoding: [0x02,0x11,0xe0,0xe3]
>> +; CHECK: mvn r1, #2, #2 @ encoding: [0x02,0x11,0xe0,0xe3]
>> ret i64 9223372036854775807
>> }
>>
>> @@ -229,7 +229,7 @@
>>
>> define void @f24(i32 %a) {
>> ; CHECK: f24
>> -; CHECK: cmp r0, #1, 16 @ encoding: [0x01,0x08,0x50,0xe3]
>> +; CHECK: cmp r0, #1, #16 @ encoding: [0x01,0x08,0x50,0xe3]
>> %b = icmp ugt i32 %a, 65536
>> br i1 %b, label %r, label %r
>> r:
>>
>> Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=128897&r1=128896&r2=128897&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
>> +++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Tue Apr 5 13:02:46 2011
>> @@ -1,6 +1,6 @@
>> # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 | FileCheck %s
>>
>> -# CHECK: addpl r4, pc, #19, 8
>> +# CHECK: addpl r4, pc, #19, #8
>> 0x4c 0x45 0x8f 0x52
>>
>> # CHECK: b #0
>> @@ -66,7 +66,7 @@
>> # CHECK: movt r8, #65535
>> 0xff 0x8f 0x4f 0xe3
>>
>> -# CHECK: mvnspl r7, #245, 2
>> +# CHECK: mvnspl r7, #245, #2
>> 0xf5 0x71 0xf0 0x53
>>
>> # CHECK-NOT: orr r7, r8, r7, rrx #0
>> @@ -143,7 +143,7 @@
>> # CHECK: msr cpsr_fc, r0
>> 0x00 0xf0 0x29 0xe1
>>
>> -# CHECK: msrmi cpsr_c, #241, 8
>> +# CHECK: msrmi cpsr_c, #241, #8
>> 0xf1 0xf4 0x21 0x43
>>
>> # CHECK: rsbs r6, r7, r8
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
More information about the llvm-commits
mailing list