[llvm-commits] [llvm] r128906 - in /llvm/trunk/test/CodeGen/ARM: constants.ll fp.ll long.ll select-imm.ll select_xform.ll sub.ll

[Johnny Chen]

Author: johnny
Date: Tue Apr  5 13:41:40 2011
New Revision: 128906

URL: http://llvm.org/viewvc/llvm-project?rev=128906&view=rev
Log:
Fix test-llvm failures.

Modified:
    llvm/trunk/test/CodeGen/ARM/constants.ll
    llvm/trunk/test/CodeGen/ARM/fp.ll
    llvm/trunk/test/CodeGen/ARM/long.ll
    llvm/trunk/test/CodeGen/ARM/select-imm.ll
    llvm/trunk/test/CodeGen/ARM/select_xform.ll
    llvm/trunk/test/CodeGen/ARM/sub.ll

Modified: llvm/trunk/test/CodeGen/ARM/constants.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constants.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/constants.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/constants.ll Tue Apr  5 13:41:40 2011
@@ -14,31 +14,31 @@
 
 define i32 @f3() {
 ; CHECK: f3
-; CHECK: mov r0, #1, 24
+; CHECK: mov r0, #1, #24
         ret i32 256
 }
 
 define i32 @f4() {
 ; CHECK: f4
-; CHECK: orr{{.*}}#1, 24
+; CHECK: orr{{.*}}#1, #24
         ret i32 257
 }
 
 define i32 @f5() {
 ; CHECK: f5
-; CHECK: mov r0, #255, 2
+; CHECK: mov r0, #255, #2
         ret i32 -1073741761
 }
 
 define i32 @f6() {
 ; CHECK: f6
-; CHECK: mov r0, #63, 28
+; CHECK: mov r0, #63, #28
         ret i32 1008
 }
 
 define void @f7(i32 %a) {
 ; CHECK: f7
-; CHECK: cmp r0, #1, 16
+; CHECK: cmp r0, #1, #16
         %b = icmp ugt i32 %a, 65536
         br i1 %b, label %r, label %r
 r:

Modified: llvm/trunk/test/CodeGen/ARM/fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp.ll Tue Apr  5 13:41:40 2011
@@ -51,7 +51,7 @@
 
 define float @h2() {
 ;CHECK: h2:
-;CHECK: mov r0, #254, 10
+;CHECK: mov r0, #254, #10
 entry:
         ret float 1.000000e+00
 }

Modified: llvm/trunk/test/CodeGen/ARM/long.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/long.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/long.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/long.ll Tue Apr  5 13:41:40 2011
@@ -14,14 +14,14 @@
 
 define i64 @f3() {
 ; CHECK: f3:
-; CHECK: mvn r0, #2, 2
+; CHECK: mvn r0, #2, #2
 entry:
         ret i64 2147483647
 }
 
 define i64 @f4() {
 ; CHECK: f4:
-; CHECK: mov r0, #2, 2
+; CHECK: mov r0, #2, #2
 entry:
         ret i64 2147483648
 }
@@ -29,7 +29,7 @@
 define i64 @f5() {
 ; CHECK: f5:
 ; CHECK: mvn r0, #0
-; CHECK: mvn r1, #2, 2
+; CHECK: mvn r1, #2, #2
 entry:
         ret i64 9223372036854775807
 }

Modified: llvm/trunk/test/CodeGen/ARM/select-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select-imm.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select-imm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select-imm.ll Tue Apr  5 13:41:40 2011
@@ -6,7 +6,7 @@
 entry:
 ; ARM: t1:
 ; ARM: mov r1, #101
-; ARM: orr r1, r1, #1, 24
+; ARM: orr r1, r1, #1, #24
 ; ARM: movgt r0, #123
 
 ; ARMT2: t1:
@@ -27,7 +27,7 @@
 ; ARM: t2:
 ; ARM: mov r0, #123
 ; ARM: movgt r0, #101
-; ARM: orrgt r0, r0, #1, 24
+; ARM: orrgt r0, r0, #1, #24
 
 ; ARMT2: t2:
 ; ARMT2: mov r0, #123

Modified: llvm/trunk/test/CodeGen/ARM/select_xform.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select_xform.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select_xform.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select_xform.ll Tue Apr  5 13:41:40 2011
@@ -4,7 +4,7 @@
 
 define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind {
 ; ARM: t1:
-; ARM: sub r0, r1, #6, 2
+; ARM: sub r0, r1, #6, #2
 ; ARM: movgt r0, r1
 
 ; T2: t1:

Modified: llvm/trunk/test/CodeGen/ARM/sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/sub.ll?rev=128906&r1=128905&r2=128906&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/sub.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/sub.ll Tue Apr  5 13:41:40 2011
@@ -12,7 +12,7 @@
 ; 66846720 = 0x03fc0000
 define i64 @f2(i64 %a) {
 ; CHECK: f2
-; CHECK: subs r0, r0, #255, 14
+; CHECK: subs r0, r0, #255, #14
 ; CHECK: sbc r1, r1, #0
     %tmp = sub i64 %a, 66846720
     ret i64 %tmp