[llvm-commits] [llvm] r128835 - /llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll

[Jakob Stoklund Olesen]

Author: stoklund
Date: Mon Apr  4 12:57:26 2011
New Revision: 128835

URL: http://llvm.org/viewvc/llvm-project?rev=128835&view=rev
Log:
Disable the PowerPC/Atomics-64 test.

The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is
wrong, and I don't know how to fix it. It seems to be using the correct register
classes for pointers, but it inserts all 32-bit instructions.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll?rev=128835&r1=128834&r2=128835&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/Atomics-64.ll Mon Apr  4 12:57:26 2011
@@ -1,5 +1,11 @@
-; RUN: llc < %s -march=ppc64
-; ModuleID = 'Atomics.c'
+; RUN: llc < %s -march=ppc64 -verify-machineinstrs
+;
+; This test is disabled until PPCISelLowering learns to insert proper 64-bit
+; code for ATOMIC_CMP_SWAP. Currently, it is inserting 32-bit instructions with
+; 64-bit operands which causes the machine code verifier to throw a tantrum.
+;
+; XFAIL: *
+
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
 target triple = "powerpc64-apple-darwin9"
 @sc = common global i8 0		; <i8*> [#uses=52]