[llvm-commits] [llvm] r128467 - /llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Evan Cheng
evan.cheng at apple.com
Tue Mar 29 10:53:13 PDT 2011
Still not quite right.
BuildMI(MBB, MBBI, dl, TII->get(BaseOpc), NewBase)
.addReg(Base, getKillRegState(BaseKill)).addImm(Offset)
.addImm(Pred).addReg(PredReg).addReg(0);
Base = NewBase;
BaseKill = true; // New base is always killed right its use.
}
bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS ||
Opcode == ARM::VLDRD);
Opcode = getLoadStoreMultipleOpcode(Opcode, Mode);
This could have introduced an instruction to calculate the new base register.
Evan
On Mar 29, 2011, at 10:42 AM, Owen Anderson wrote:
> Author: resistor
> Date: Tue Mar 29 12:42:25 2011
> New Revision: 128467
>
> URL: http://llvm.org/viewvc/llvm-project?rev=128467&view=rev
> Log:
> Add safety check that didn't show up in testing.
>
> Modified:
> llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=128467&r1=128466&r2=128467&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Tue Mar 29 12:42:25 2011
> @@ -350,6 +350,7 @@
> bool isDef = (isi32Load(Opcode) || Opcode == ARM::VLDRS ||
> Opcode == ARM::VLDRD);
> Opcode = getLoadStoreMultipleOpcode(Opcode, Mode);
> + if (!Opcode) return false;
> MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
> .addReg(Base, getKillRegState(BaseKill))
> .addImm(Pred).addReg(PredReg);
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list