[llvm-commits] [llvm] r127463 - in /llvm/trunk: lib/Analysis/ValueTracking.cpp test/Transforms/InstSimplify/compare.ll
Nick Lewycky
nicholas at mxc.ca
Fri Mar 11 01:00:19 PST 2011
Author: nicholas
Date: Fri Mar 11 03:00:19 2011
New Revision: 127463
URL: http://llvm.org/viewvc/llvm-project?rev=127463&view=rev
Log:
Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can
do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15!
Modified:
llvm/trunk/lib/Analysis/ValueTracking.cpp
llvm/trunk/test/Transforms/InstSimplify/compare.ll
Modified: llvm/trunk/lib/Analysis/ValueTracking.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/ValueTracking.cpp?rev=127463&r1=127462&r2=127463&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/ValueTracking.cpp (original)
+++ llvm/trunk/lib/Analysis/ValueTracking.cpp Fri Mar 11 03:00:19 2011
@@ -429,6 +429,20 @@
KnownZero |= LHSKnownZero & Mask;
KnownOne |= LHSKnownOne & Mask;
}
+
+ // Are we still trying to solve for the sign bit?
+ if (Mask.isNegative() && !KnownZero.isNegative() && !KnownOne.isNegative()){
+ OverflowingBinaryOperator *OBO = cast<OverflowingBinaryOperator>(I);
+ if (OBO->hasNoSignedWrap()) {
+ // Adding two positive numbers can't wrap into negative ...
+ if (LHSKnownZero.isNegative() && KnownZero2.isNegative())
+ KnownZero |= APInt::getSignBit(BitWidth);
+ // and adding two negative numbers can't wrap into positive.
+ else if (LHSKnownOne.isNegative() && KnownOne2.isNegative())
+ KnownOne |= APInt::getSignBit(BitWidth);
+ }
+ }
+
return;
}
case Instruction::SRem:
Modified: llvm/trunk/test/Transforms/InstSimplify/compare.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/compare.ll?rev=127463&r1=127462&r2=127463&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstSimplify/compare.ll (original)
+++ llvm/trunk/test/Transforms/InstSimplify/compare.ll Fri Mar 11 03:00:19 2011
@@ -261,6 +261,16 @@
; CHECK: ret i1 false
}
+; PR9343 #15
+; CHECK: @srem2
+; CHECK: ret i1 false
+define i1 @srem2(i16 %X, i32 %Y) {
+ %A = zext i16 %X to i32
+ %B = add nsw i32 %A, 1
+ %C = srem i32 %B, %Y
+ %D = icmp slt i32 %C, 0
+ ret i1 %D
+}
define i1 @udiv1(i32 %X) {
; CHECK: @udiv1
%A = udiv i32 %X, 1000000
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