[llvm-commits] [llvm] r126964 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/LegalizeTypes.h test/CodeGen/X86/umulo-64.ll

[Eli Friedman]

Author: efriedma
Date: Thu Mar  3 16:33:23 2011
New Revision: 126964

URL: http://llvm.org/viewvc/llvm-project?rev=126964&view=rev
Log:
Revert r123908; the code in question is completely untested and wrong.


Removed:
    llvm/trunk/test/CodeGen/X86/umulo-64.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=126964&r1=126963&r2=126964&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Mar  3 16:33:23 2011
@@ -1051,8 +1051,6 @@
   case ISD::SSUBO: ExpandIntRes_SADDSUBO(N, Lo, Hi); break;
   case ISD::UADDO:
   case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break;
-  case ISD::UMULO:
-  case ISD::SMULO: ExpandIntRes_UMULSMULO(N, Lo, Hi); break;
   }
 
   // If Lo/Hi is null, the sub-method took care of registering results etc.
@@ -2128,31 +2126,6 @@
   ReplaceValueWith(SDValue(N, 1), Ofl);
 }
 
-void DAGTypeLegalizer::ExpandIntRes_UMULSMULO(SDNode *N,
-                                              SDValue &Lo, SDValue &Hi) {
-  SDValue LHS = N->getOperand(0);
-  SDValue RHS = N->getOperand(1);
-  DebugLoc dl = N->getDebugLoc();
-  EVT VT = N->getValueType(0);
-  EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() / 2);
-  // Expand the result by simply replacing it with the equivalent
-  // non-overflow-checking operation.
-  SDValue Ret = DAG.getNode(ISD::MUL, dl, LHS.getValueType(), LHS, RHS);
-  SplitInteger(Ret, Lo, Hi);
-
-  // Now calculate overflow.
-  SDValue Ofl;
-  if (N->getOpcode() == ISD::UMULO)
-    Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi,
-                       DAG.getConstant(0, VT), ISD::SETNE);
-  else {
-    SDValue Tmp = DAG.getConstant(VT.getSizeInBits() - 1, HalfVT);
-    Tmp = DAG.getNode(ISD::SRA, dl, HalfVT, Lo, Tmp);
-    Ofl = DAG.getSetCC(dl, N->getValueType(1), Hi, Tmp, ISD::SETNE);
-  }
-  ReplaceValueWith(SDValue(N, 1), Ofl);
-}
-
 void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
                                          SDValue &Lo, SDValue &Hi) {
   EVT VT = N->getValueType(0);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=126964&r1=126963&r2=126964&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Mar  3 16:33:23 2011
@@ -348,7 +348,6 @@
 
   void ExpandIntRes_SADDSUBO          (SDNode *N, SDValue &Lo, SDValue &Hi);
   void ExpandIntRes_UADDSUBO          (SDNode *N, SDValue &Lo, SDValue &Hi);
-  void ExpandIntRes_UMULSMULO	      (SDNode *N, SDValue &Lo, SDValue &Hi);
 
   void ExpandShiftByConstant(SDNode *N, unsigned Amt,
                              SDValue &Lo, SDValue &Hi);

Removed: llvm/trunk/test/CodeGen/X86/umulo-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/umulo-64.ll?rev=126963&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/umulo-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/umulo-64.ll (removed)
@@ -1,28 +0,0 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
-
-%0 = type { i64, i1 }
-
-define i32 @f0(i64 %a, i64 %b) nounwind ssp {
-  %1 = alloca i64, align 4
-  %2 = alloca i64, align 4
-  store i64 %a, i64* %1, align 8
-  store i64 %b, i64* %2, align 8
-  %3 = load i64* %1, align 8
-  %4 = load i64* %2, align 8
-  %5 = call %0 @llvm.smul.with.overflow.i64(i64 %3, i64 %4)
-  %6 = extractvalue %0 %5, 0
-  %7 = extractvalue %0 %5, 1
-  br i1 %7, label %8, label %9
-
-; <label>:8                                       ; preds = %0
-  call void @llvm.trap()
-  unreachable
-
-; <label>:9                                       ; preds = %0
-  %10 = trunc i64 %6 to i32
-  ret i32 %10
-}
-
-declare %0 @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
-
-declare void @llvm.trap() nounwind