[llvm-commits] [llvm] r126895 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/Disassembler/ARM/arm-tests.txt

[Bob Wilson]

The patch was actually done by Jyun-Yan You.  This fixes pr9366.

On Mar 2, 2011, at 3:08 PM, Kevin Enderby wrote:

> Author: enderby
> Date: Wed Mar  2 17:08:33 2011
> New Revision: 126895
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=126895&view=rev
> Log:
> Fixes an assertion failure while disassembling ARM rsbs reg/reg form.
> Patch by Ted Kremenek!
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>    llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=126895&r1=126894&r2=126895&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Mar  2 17:08:33 2011
> @@ -2203,6 +2203,19 @@
>   let Inst{19-16} = Rn;
>   let Inst{11-0} = imm;
> }
> +def RSBSrr : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm,
> +                 IIC_iALUr, "rsbs", "\t$Rd, $Rn, $Rm",
> +                 [/* For disassembly only; pattern left blank */]> {
> +  bits<4> Rd;
> +  bits<4> Rn;
> +  bits<4> Rm;
> +  let Inst{11-4} = 0b00000000;
> +  let Inst{25} = 0;
> +  let Inst{20} = 1;
> +  let Inst{3-0} = Rm;
> +  let Inst{15-12} = Rd;
> +  let Inst{19-16} = Rn;
> +}
> def RSBSrs : AI1<0b0011, (outs GPR:$Rd), (ins GPR:$Rn, so_reg:$shift),
>                  DPSoRegFrm, IIC_iALUsr, "rsbs", "\t$Rd, $Rn, $shift",
>                  [(set GPR:$Rd, (subc so_reg:$shift, GPR:$Rn))]> {
> 
> Modified: llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt?rev=126895&r1=126894&r2=126895&view=diff
> ==============================================================================
> --- llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt (original)
> +++ llvm/trunk/test/MC/Disassembler/ARM/arm-tests.txt Wed Mar  2 17:08:33 2011
> @@ -130,3 +130,6 @@
> 
> # CHECK: msr cpsr_fc, r0
> 0x00 0xf0 0x29 0xe1
> +
> +# CHECK: rsbs r6, r7, r8
> +0x08 0x60 0x77 0xe0
> 
> 
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