[llvm-commits] [llvm] r126731 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp utils/TableGen/DAGISelEmitter.cpp utils/TableGen/DAGISelMatcher.h utils/TableGen/DAGISelMatcherEmitter.cpp
Jim Grosbach
grosbach at apple.com
Mon Feb 28 17:37:19 PST 2011
Author: grosbach
Date: Mon Feb 28 19:37:19 2011
New Revision: 126731
URL: http://llvm.org/viewvc/llvm-project?rev=126731&view=rev
Log:
Generalize the register matching code in DAGISel a bit.
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
llvm/trunk/utils/TableGen/DAGISelMatcher.h
llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=126731&r1=126730&r2=126731&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Mon Feb 28 19:37:19 2011
@@ -127,6 +127,7 @@
OPC_EmitInteger,
OPC_EmitRegister,
+ OPC_EmitRegister2,
OPC_EmitConvertToTarget,
OPC_EmitMergeInputChains,
OPC_EmitMergeInputChains1_0,
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=126731&r1=126730&r2=126731&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Feb 28 19:37:19 2011
@@ -2392,6 +2392,18 @@
CurDAG->getRegister(RegNo, VT), (SDNode*)0));
continue;
}
+ case OPC_EmitRegister2: {
+ // For targets w/ more than 256 register names, the register enum
+ // values are stored in two bytes in the matcher table (just like
+ // opcodes).
+ MVT::SimpleValueType VT =
+ (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+ unsigned RegNo = MatcherTable[MatcherIndex++];
+ RegNo |= MatcherTable[MatcherIndex++] << 8;
+ RecordedNodes.push_back(std::pair<SDValue, SDNode*>(
+ CurDAG->getRegister(RegNo, VT), (SDNode*)0));
+ continue;
+ }
case OPC_EmitConvertToTarget: {
// Convert from IMM/FPIMM to target version.
Modified: llvm/trunk/utils/TableGen/DAGISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelEmitter.cpp?rev=126731&r1=126730&r2=126731&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelEmitter.cpp Mon Feb 28 19:37:19 2011
@@ -148,8 +148,12 @@
Matcher *TheMatcher = new ScopeMatcher(&PatternMatchers[0],
PatternMatchers.size());
+ CodeGenTarget Target(Records);
+ const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
+ bool useEmitRegister2 = Registers.size() > 255;
+
TheMatcher = OptimizeMatcher(TheMatcher, CGP);
//Matcher->dump();
- EmitMatcherTable(TheMatcher, CGP, OS);
+ EmitMatcherTable(TheMatcher, CGP, useEmitRegister2, OS);
delete TheMatcher;
}
Modified: llvm/trunk/utils/TableGen/DAGISelMatcher.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcher.h?rev=126731&r1=126730&r2=126731&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcher.h (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcher.h Mon Feb 28 19:37:19 2011
@@ -29,7 +29,7 @@
const CodeGenDAGPatterns &CGP);
Matcher *OptimizeMatcher(Matcher *Matcher, const CodeGenDAGPatterns &CGP);
void EmitMatcherTable(const Matcher *Matcher, const CodeGenDAGPatterns &CGP,
- raw_ostream &OS);
+ bool useEmitRegister2, raw_ostream &OS);
/// Matcher - Base class for all the the DAG ISel Matcher representation
Modified: llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp?rev=126731&r1=126730&r2=126731&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp Mon Feb 28 19:37:19 2011
@@ -43,8 +43,11 @@
DenseMap<Record*, unsigned> NodeXFormMap;
std::vector<Record*> NodeXForms;
+ bool useEmitRegister2;
+
public:
- MatcherTableEmitter(const CodeGenDAGPatterns &cgp) : CGP(cgp) {}
+ MatcherTableEmitter(const CodeGenDAGPatterns &cgp, bool _useEmitRegister2)
+ : CGP(cgp), useEmitRegister2(_useEmitRegister2) {}
unsigned EmitMatcherList(const Matcher *N, unsigned Indent,
unsigned StartIdx, formatted_raw_ostream &OS);
@@ -255,7 +258,7 @@
}
case Matcher::CheckOpcode:
- OS << "OPC_CheckOpcode, TARGET_OPCODE("
+ OS << "OPC_CheckOpcode, TARGET_VAL("
<< cast<CheckOpcodeMatcher>(N)->getOpcode().getEnumName() << "),\n";
return 3;
@@ -321,7 +324,7 @@
OS << ' ';
if (const SwitchOpcodeMatcher *SOM = dyn_cast<SwitchOpcodeMatcher>(N))
- OS << "TARGET_OPCODE(" << SOM->getCaseOpcode(i).getEnumName() << "),";
+ OS << "TARGET_VAL(" << SOM->getCaseOpcode(i).getEnumName() << "),";
else
OS << getEnumName(cast<SwitchTypeMatcher>(N)->getCaseType(i)) << ',';
@@ -429,17 +432,31 @@
}
case Matcher::EmitRegister:
- OS << "OPC_EmitRegister, "
- << getEnumName(cast<EmitRegisterMatcher>(N)->getVT()) << ", ";
- if (Record *R = cast<EmitRegisterMatcher>(N)->getReg())
- OS << getQualifiedName(R) << ",\n";
- else {
- OS << "0 ";
- if (!OmitComments)
- OS << "/*zero_reg*/";
- OS << ",\n";
+ if (useEmitRegister2) {
+ OS << "OPC_EmitRegister2, "
+ << getEnumName(cast<EmitRegisterMatcher>(N)->getVT()) << ", ";
+ if (Record *R = cast<EmitRegisterMatcher>(N)->getReg())
+ OS << "TARGET_VAL(" << getQualifiedName(R) << "),\n";
+ else {
+ OS << "TARGET_VAL(0) ";
+ if (!OmitComments)
+ OS << "/*zero_reg*/";
+ OS << ",\n";
+ }
+ return 4;
+ } else {
+ OS << "OPC_EmitRegister, "
+ << getEnumName(cast<EmitRegisterMatcher>(N)->getVT()) << ", ";
+ if (Record *R = cast<EmitRegisterMatcher>(N)->getReg())
+ OS << getQualifiedName(R) << ",\n";
+ else {
+ OS << "0 ";
+ if (!OmitComments)
+ OS << "/*zero_reg*/";
+ OS << ",\n";
+ }
+ return 3;
}
- return 3;
case Matcher::EmitConvertToTarget:
OS << "OPC_EmitConvertToTarget, "
@@ -482,7 +499,7 @@
case Matcher::MorphNodeTo: {
const EmitNodeMatcherCommon *EN = cast<EmitNodeMatcherCommon>(N);
OS << (isa<EmitNodeMatcher>(EN) ? "OPC_EmitNode" : "OPC_MorphNodeTo");
- OS << ", TARGET_OPCODE(" << EN->getOpcodeName() << "), 0";
+ OS << ", TARGET_VAL(" << EN->getOpcodeName() << "), 0";
if (EN->hasChain()) OS << "|OPFL_Chain";
if (EN->hasInFlag()) OS << "|OPFL_GlueInput";
@@ -782,23 +799,26 @@
void llvm::EmitMatcherTable(const Matcher *TheMatcher,
- const CodeGenDAGPatterns &CGP, raw_ostream &O) {
+ const CodeGenDAGPatterns &CGP,
+ bool useEmitRegister2,
+ raw_ostream &O) {
formatted_raw_ostream OS(O);
OS << "// The main instruction selector code.\n";
OS << "SDNode *SelectCode(SDNode *N) {\n";
- MatcherTableEmitter MatcherEmitter(CGP);
+ MatcherTableEmitter MatcherEmitter(CGP, useEmitRegister2);
- OS << " // Opcodes are emitted as 2 bytes, TARGET_OPCODE handles this.\n";
- OS << " #define TARGET_OPCODE(X) X & 255, unsigned(X) >> 8\n";
+ OS << " // Some target values are emitted as 2 bytes, TARGET_VAL handles\n";
+ OS << " // this.\n";
+ OS << " #define TARGET_VAL(X) X & 255, unsigned(X) >> 8\n";
OS << " static const unsigned char MatcherTable[] = {\n";
unsigned TotalSize = MatcherEmitter.EmitMatcherList(TheMatcher, 5, 0, OS);
OS << " 0\n }; // Total Array size is " << (TotalSize+1) << " bytes\n\n";
MatcherEmitter.EmitHistogram(TheMatcher, OS);
- OS << " #undef TARGET_OPCODE\n";
+ OS << " #undef TARGET_VAL\n";
OS << " return SelectCodeCommon(N, MatcherTable,sizeof(MatcherTable));\n}\n";
OS << '\n';
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