[llvm-commits] [llvm] r125074 - in /llvm/trunk/lib/Target/ARM: ARMConstantIslandPass.cpp Thumb2SizeReduction.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Feb  7 21:07:03 2011
New Revision: 125074

URL: http://llvm.org/viewvc/llvm-project?rev=125074&view=rev
Log:
Temporary workaround for a bad bug introduced by r121082 which replaced
t2LDRpci with t2LDRi12.
There are a couple of problems with this.
1. The encoding for the literal and immediate constant are different.
   Note bit 7 of the literal case is 'U' so it can be negative.
2. t2LDRi12 is now narrowed to tLDRpci before constant island pass is run.
   So we end up never using the Thumb2 instruction, which ends up creating a
   lot more constant islands.

Modified:
    llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
    llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp?rev=125074&r1=125073&r2=125074&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp Mon Feb  7 21:07:03 2011
@@ -1576,6 +1576,16 @@
         Scale = 4;
       }
       break;
+    case ARM::t2LDRi12:
+      // FIXME: Temporary workaround for a  bug introduced by r121082.
+      // We should use t2LDRpci for loads from constantpools.
+      if (isARMLowRegister(U.MI->getOperand(0).getReg()) &&
+          U.MI->getOperand(1).getReg() == ARM::PC) {
+        NewOpc = ARM::tLDRpci;
+        Bits = 8;
+        Scale = 4;
+      }
+      break;
     }
 
     if (!NewOpc)
@@ -1586,6 +1596,10 @@
     // FIXME: Check if offset is multiple of scale if scale is not 4.
     if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) {
       U.MI->setDesc(TII->get(NewOpc));
+      if (NewOpc == ARM::tLDRpci)
+        // FIXME: Temporary workaround.
+        // PC is now an implicit operand.
+        U.MI->RemoveOperand(1);
       MachineBasicBlock *MBB = U.MI->getParent();
       BBSizes[MBB->getNumber()] -= 2;
       AdjustBBOffsetsAfter(MBB, -2);

Modified: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp?rev=125074&r1=125073&r2=125074&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp Mon Feb  7 21:07:03 2011
@@ -294,14 +294,11 @@
       HasImmOffset = true;
       HasOffReg = false;
     } else {
-      if (Entry.WideOpc == ARM::t2LDRi12) {
-        Opc = ARM::tLDRpci;
-        OpNum = 2;
-      }
-
-      HasImmOffset = false;
-      HasBaseReg = false;
-      HasOffReg = false;
+      // FIXME: Temporary workaround for a  bug introduced by r121082.
+      // We should use t2LDRpci for loads from constantpools.
+      // We don't want to narrow this to tLDRpci until constant island pass
+      // for fear of pessimizing code.
+      return false;
     }
     break;
   case ARM::t2LDRBi12: