[llvm-commits] [llvm] r124064 - in /llvm/trunk: lib/Transforms/Scalar/ScalarReplAggregates.cpp test/Transforms/ScalarRepl/vector_promote.ll

[Chris Lattner]

Author: lattner
Date: Sun Jan 23 00:40:33 2011
New Revision: 124064

URL: http://llvm.org/viewvc/llvm-project?rev=124064&view=rev
Log:
remove an old hack that avoided creating MMX datatypes.  The
X86 backend has been fixed.

Modified:
    llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
    llvm/trunk/test/Transforms/ScalarRepl/vector_promote.ll

Modified: llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp?rev=124064&r1=124063&r2=124064&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/ScalarReplAggregates.cpp Sun Jan 23 00:40:33 2011
@@ -247,26 +247,6 @@
 } // end anonymous namespace.
 
 
-/// IsVerbotenVectorType - Return true if this is a vector type ScalarRepl isn't
-/// allowed to form.  We do this to avoid MMX types, which is a complete hack,
-/// but is required until the backend is fixed.
-static bool IsVerbotenVectorType(const VectorType *VTy, const Instruction *I) {
-  StringRef Triple(I->getParent()->getParent()->getParent()->getTargetTriple());
-  if (!Triple.startswith("i386") &&
-      !Triple.startswith("x86_64"))
-    return false;
-
-  // Reject all the MMX vector types.
-  switch (VTy->getNumElements()) {
-  default: return false;
-  case 1: return VTy->getElementType()->isIntegerTy(64);
-  case 2: return VTy->getElementType()->isIntegerTy(32);
-  case 4: return VTy->getElementType()->isIntegerTy(16);
-  case 8: return VTy->getElementType()->isIntegerTy(8);
-  }
-}
-
-
 /// TryConvert - Analyze the specified alloca, and if it is safe to do so,
 /// rewrite it to be a new alloca which is mem2reg'able.  This returns the new
 /// alloca if possible or null if not.
@@ -283,8 +263,7 @@
   // we just get a lot of insert/extracts.  If at least one vector is
   // involved, then we probably really do have a union of vector/array.
   const Type *NewTy;
-  if (VectorTy && VectorTy->isVectorTy() && HadAVector &&
-      !IsVerbotenVectorType(cast<VectorType>(VectorTy), AI)) {
+  if (VectorTy && VectorTy->isVectorTy() && HadAVector) {
     DEBUG(dbgs() << "CONVERT TO VECTOR: " << *AI << "\n  TYPE = "
           << *VectorTy << '\n');
     NewTy = VectorTy;  // Use the vector type.

Modified: llvm/trunk/test/Transforms/ScalarRepl/vector_promote.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/ScalarRepl/vector_promote.ll?rev=124064&r1=124063&r2=124064&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/ScalarRepl/vector_promote.ll (original)
+++ llvm/trunk/test/Transforms/ScalarRepl/vector_promote.ll Sun Jan 23 00:40:33 2011
@@ -87,8 +87,6 @@
 }
 
 
-;; should not turn into <1 x i64> - It is a banned MMX datatype.
-;; rdar://8380055
 define i64 @test6(<2 x float> %X) {
 	%X_addr = alloca <2 x float>
         store <2 x float> %X, <2 x float>* %X_addr
@@ -96,7 +94,7 @@
 	%tmp = load i64* %P
 	ret i64 %tmp
 ; CHECK: @test6
-; CHECK-NEXT: bitcast <2 x float> %X to i64
-; CHECK-NEXT: ret i64
+; CHECK: bitcast <2 x float> %X to <1 x i64>
+; CHECK: ret i64
 }