[llvm-commits] [llvm] r123547 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Chris Lattner]

On Jan 17, 2011, at 4:24 AM, Benjamin Kramer wrote:

>> These "popcount = 3" and "popcount < 2" sorts of cases seems that they could use a couple iterations of the unrolled "a &= a-1" checks or something, instead of computing the full computation.
> 
> popcount < 2 is caught by the new DAGCombine.
> 
> If we want to expand popcount = 3 we would have to emit 3 branches:
> a != 0 && (a &= a-1) != 0 && (a & a-1) == 0
> I don't think that's worth it.

Yeah, I agree.

>> For example, the top of GenerateCheckEvasions has "popcount(x) == 1" which seems that it could be something like "x != 0 && (x & (x-1) == 0)" cheaper than expanding the popcount.  This sort of thing is a bad idea of ctpop expands to a single cycle instruction though, so this is probably best to do in dag combine instead of instcombine.
> 
> Agreed, I planted a TODO in the DAGCombiner. I don't know how to lower this to get optimal code though.

It looks like we get reasonable codegen for this IR (which is just the simple straight-line icmp+and code legalize would naturally produce):

define i32 @test(i32 %x) nounwind readnone ssp {
entry:
  %cmp = icmp ne i32 %x, 0
  %sub = add nsw i32 %x, -1
  %and = and i32 %sub, %x
  %cmp3 = icmp eq i32 %and, 0
  %and56 = and i1 %cmp, %cmp3
  %and5 = zext i1 %and56 to i32
  ret i32 %and5
}

_test:                                  ## @test
	leal	-1(%rdi), %eax
	testl	%edi, %eax
	sete	%al
	testl	%edi, %edi
	setne	%cl
	andb	%al, %cl
	movzbl	%cl, %eax
	ret

It is too bad X86 doesn't have a "conditional and" and "conditional or" idiom, it seems that some setcc&setcc idioms would benefit from it.

-Chris