[llvm-commits] [llvm] r123559 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/X86/X86FastISel.cpp test/CodeGen/X86/fast-isel-gep.ll
Chris Lattner
sabre at nondot.org
Sat Jan 15 18:27:39 PST 2011
Author: lattner
Date: Sat Jan 15 20:27:38 2011
New Revision: 123559
URL: http://llvm.org/viewvc/llvm-project?rev=123559&view=rev
Log:
reapply my fix for PR8961 with a tweak to properly handle
multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=123559&r1=123558&r2=123559&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Jan 15 20:27:38 2011
@@ -771,8 +771,16 @@
assert(RI.getOperand().isUse() &&
"The only use of the vreg must be a use, we haven't emitted the def!");
+ MachineInstr *User = &*RI;
+
+ // Set the insertion point properly. Folding the load can cause generation of
+ // other random instructions (like sign extends) for addressing modes, make
+ // sure they get inserted in a logical place before the new instruction.
+ FuncInfo->InsertPt = User;
+ FuncInfo->MBB = User->getParent();
+
// Ask the target to try folding the load.
- return FastIS->TryToFoldLoad(&*RI, RI.getOperandNo(), LI);
+ return FastIS->TryToFoldLoad(User, RI.getOperandNo(), LI);
}
#ifndef NDEBUG
@@ -890,11 +898,9 @@
if (Inst != Begin)
BeforeInst = llvm::prior(llvm::prior(BI));
if (BeforeInst && isa<LoadInst>(BeforeInst) &&
- BeforeInst->hasOneUse() && *BeforeInst->use_begin() == Inst) {
- FastIS->recomputeInsertPt();
- if (TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), FastIS))
- --BI; // If we succeeded, don't re-select the load.
- }
+ BeforeInst->hasOneUse() && *BeforeInst->use_begin() == Inst &&
+ TryToFoldFastISelLoad(cast<LoadInst>(BeforeInst), FastIS))
+ --BI; // If we succeeded, don't re-select the load.
continue;
}
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=123559&r1=123558&r2=123559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Sat Jan 15 20:27:38 2011
@@ -1933,7 +1933,7 @@
XII.foldMemoryOperandImpl(*FuncInfo.MF, MI, OpNo, AddrOps, Size, Alignment);
if (Result == 0) return false;
- MI->getParent()->insert(MI, Result);
+ FuncInfo.MBB->insert(FuncInfo.InsertPt, Result);
MI->eraseFromParent();
return true;
}
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll?rev=123559&r1=123558&r2=123559&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll Sat Jan 15 20:27:38 2011
@@ -70,3 +70,20 @@
; X64: test4:
; X64: 128(%r{{.*}},%r{{.*}},8)
}
+
+; PR8961 - Make sure the sext for the GEP addressing comes before the load that
+; is folded.
+define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind {
+ %v8 = getelementptr i8* %A, i32 %I
+ %v9 = bitcast i8* %v8 to i64*
+ %v10 = load i64* %v9
+ %v11 = add i64 %B, %v10
+ ret i64 %v11
+; X64: test5:
+; X64: movslq %esi, %rax
+; X64-NEXT: movq (%rdi,%rax), %rax
+; X64-NEXT: addq %rdx, %rax
+; X64-NEXT: ret
+}
+
+
More information about the llvm-commits
mailing list