[llvm-commits] [llvm] r123490 - in /llvm/trunk/utils/TableGen: AsmMatcherEmitter.cpp CodeGenInstruction.cpp

Bob Wilson bob.wilson at apple.com
Fri Jan 14 14:58:09 PST 2011


Author: bwilson
Date: Fri Jan 14 16:58:09 2011
New Revision: 123490

URL: http://llvm.org/viewvc/llvm-project?rev=123490&view=rev
Log:
Fix some tablegen issues to allow using zero_reg for InstAlias definitions.

This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

Modified:
    llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp

Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=123490&r1=123489&r2=123490&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Fri Jan 14 16:58:09 2011
@@ -1380,9 +1380,14 @@
         break;
       }
       case MatchableInfo::ResOperand::RegOperand: {
-        std::string N = getQualifiedName(OpInfo.Register);
-        CaseOS << "    Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
-        Signature += "__reg" + OpInfo.Register->getName();
+        if (OpInfo.Register == 0) {
+          CaseOS << "    Inst.addOperand(MCOperand::CreateReg(0));\n";
+          Signature += "__reg0";
+        } else {
+          std::string N = getQualifiedName(OpInfo.Register);
+          CaseOS << "    Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
+          Signature += "__reg" + OpInfo.Register->getName();
+        }
       }  
       }
     }

Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=123490&r1=123489&r2=123490&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Fri Jan 14 16:58:09 2011
@@ -442,6 +442,21 @@
         ++AliasOpNo;
         continue;
       }
+      if (ADI->getDef()->getName() == "zero_reg") {
+        if (!Result->getArgName(AliasOpNo).empty())
+          throw TGError(R->getLoc(), "result fixed register argument must "
+                        "not have a name!");
+
+        // Check if this is an optional def.
+        if (!ResultOpRec->isSubClassOf("OptionalDefOperand"))
+          throw TGError(R->getLoc(), "reg0 used for result that is not an "
+                        "OptionalDefOperand!");
+
+        // Now that it is validated, add it.
+        ResultOperands.push_back(ResultOperand(static_cast<Record*>(0)));
+        ++AliasOpNo;
+        continue;
+      }
     }
     
     // If the operand is a record, it must have a name, and the record type must





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