[llvm-commits] [llvm] r123175 - /llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

[Daniel Dunbar]

Author: ddunbar
Date: Mon Jan 10 09:26:21 2011
New Revision: 123175

URL: http://llvm.org/viewvc/llvm-project?rev=123175&view=rev
Log:
MC/ARM/AsmParser: Minor nitty fixes.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=123175&r1=123174&r2=123175&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Jan 10 09:26:21 2011
@@ -26,7 +26,7 @@
 #include "llvm/ADT/Twine.h"
 using namespace llvm;
 
-// The shift types for register controlled shifts in arm memory addressing
+/// Shift types used for register controlled shifts in ARM memory addressing.
 enum ShiftType {
   Lsl,
   Lsr,
@@ -134,7 +134,7 @@
       const MCExpr *Val;
     } Imm;
 
-    // This is for all forms of ARM address expressions
+    /// Combined record for all forms of ARM address expressions.
     struct {
       unsigned BaseRegNum;
       unsigned OffsetRegNum;         // used when OffsetIsReg is true
@@ -436,7 +436,7 @@
 void ARMOperand::dump(raw_ostream &OS) const {
   switch (Kind) {
   case CondCode:
-    OS << ARMCondCodeToString(getCondCode());
+    OS << "<ARMCC::" << ARMCondCodeToString(getCondCode()) << ">";
     break;
   case CCOut:
     OS << "<ccout " << getReg() << ">";