[llvm-commits] [llvm] r122653 - in /llvm/trunk: lib/Target/PTX/PTXISelDAGToDAG.cpp lib/Target/PTX/PTXInstrInfo.td test/CodeGen/PTX/ld.ll test/CodeGen/PTX/st.ll
Che-Liang Chiou
clchiou at gmail.com
Sat Jan 1 03:58:58 PST 2011
Author: clchiou
Date: Sat Jan 1 05:58:58 2011
New Revision: 122653
URL: http://llvm.org/viewvc/llvm-project?rev=122653&view=rev
Log:
ptx: remove reg-reg addressing mode and st.const
Modified:
llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp
llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
llvm/trunk/test/CodeGen/PTX/ld.ll
llvm/trunk/test/CodeGen/PTX/st.ll
Modified: llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp?rev=122653&r1=122652&r2=122653&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXISelDAGToDAG.cpp Sat Jan 1 05:58:58 2011
@@ -67,8 +67,8 @@
isImm(Addr.getOperand(0)) || isImm(Addr.getOperand(1)))
return false;
- R1 = Addr.getOperand(0);
- R2 = Addr.getOperand(1);
+ R1 = Addr;
+ R2 = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
@@ -76,17 +76,20 @@
bool PTXDAGToDAGISel::SelectADDRri(SDValue &Addr, SDValue &Base,
SDValue &Offset) {
if (Addr.getOpcode() != ISD::ADD) {
+ // let SelectADDRii handle the [imm] case
if (isImm(Addr))
return false;
- // is [reg] but not [imm]
+ // it is [reg]
Base = Addr;
Offset = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
+ if (Addr.getNumOperands() < 2)
+ return false;
+
// let SelectADDRii handle the [imm+imm] case
- if (Addr.getNumOperands() >= 2 &&
- isImm(Addr.getOperand(0)) && isImm(Addr.getOperand(1)))
+ if (isImm(Addr.getOperand(0)) && isImm(Addr.getOperand(1)))
return false;
// try [reg+imm] and [imm+reg]
@@ -96,13 +99,7 @@
return true;
}
- // either [reg+imm] and [imm+reg]
- for (int i = 0; i < 2; i ++)
- if (SelectImm(Addr.getOperand(1-i), Offset)) {
- Base = Addr.getOperand(i);
- return true;
- }
-
+ // neither [reg+imm] nor [imm+reg]
return false;
}
Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=122653&r1=122652&r2=122653&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Sat Jan 1 05:58:58 2011
@@ -76,16 +76,6 @@
return false;
}]>;
-def store_constant
- : PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
- const Value *Src;
- const PointerType *PT;
- if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
- (PT = dyn_cast<PointerType>(Src->getType())))
- return PT->getAddressSpace() == PTX::CONSTANT;
- return false;
-}]>;
-
def store_local
: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
const Value *Src;
@@ -122,10 +112,6 @@
def ADDRii : ComplexPattern<i32, 2, "SelectADDRii", [], []>;
// Address operands
-def MEMrr : Operand<i32> {
- let PrintMethod = "printMemOperand";
- let MIOperandInfo = (ops RRegs32, RRegs32);
-}
def MEMri : Operand<i32> {
let PrintMethod = "printMemOperand";
let MIOperandInfo = (ops RRegs32, i32imm);
@@ -182,7 +168,7 @@
multiclass PTX_LD<string opstr, RegisterClass RC, PatFrag pat_load> {
def rr : InstPTX<(outs RC:$d),
- (ins MEMrr:$a),
+ (ins MEMri:$a),
!strconcat(opstr, ".%type\t$d, [$a]"),
[(set RC:$d, (pat_load ADDRrr:$a))]>;
def ri : InstPTX<(outs RC:$d),
@@ -197,7 +183,7 @@
multiclass PTX_ST<string opstr, RegisterClass RC, PatFrag pat_store> {
def rr : InstPTX<(outs),
- (ins RC:$d, MEMrr:$a),
+ (ins RC:$d, MEMri:$a),
!strconcat(opstr, ".%type\t[$a], $d"),
[(pat_store RC:$d, ADDRrr:$a)]>;
def ri : InstPTX<(outs),
@@ -251,7 +237,6 @@
defm LDs : PTX_LD<"ld.shared", RRegs32, load_shared>;
defm STg : PTX_ST<"st.global", RRegs32, store_global>;
-defm STc : PTX_ST<"st.const", RRegs32, store_constant>;
defm STl : PTX_ST<"st.local", RRegs32, store_local>;
defm STp : PTX_ST<"st.param", RRegs32, store_parameter>;
defm STs : PTX_ST<"st.shared", RRegs32, store_shared>;
Modified: llvm/trunk/test/CodeGen/PTX/ld.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/ld.ll?rev=122653&r1=122652&r2=122653&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PTX/ld.ll (original)
+++ llvm/trunk/test/CodeGen/PTX/ld.ll Sat Jan 1 05:58:58 2011
@@ -30,7 +30,8 @@
define ptx_device i32 @t3(i32* %p, i32 %q) {
entry:
;CHECK: shl.b32 r0, r2, 2;
-;CHECK: ld.global.s32 r0, [r1+r0];
+;CHECK: add.s32 r0, r1, r0;
+;CHECK: ld.global.s32 r0, [r0];
%i = getelementptr i32* %p, i32 %q
%x = load i32* %i
ret i32 %x
Modified: llvm/trunk/test/CodeGen/PTX/st.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/st.ll?rev=122653&r1=122652&r2=122653&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PTX/st.ll (original)
+++ llvm/trunk/test/CodeGen/PTX/st.ll Sat Jan 1 05:58:58 2011
@@ -31,7 +31,8 @@
;CHECK: .reg .s32 r0;
entry:
;CHECK: shl.b32 r0, r2, 2;
-;CHECK: st.global.s32 [r1+r0], r3;
+;CHECK: add.s32 r0, r1, r0;
+;CHECK: st.global.s32 [r0], r3;
%i = getelementptr i32* %p, i32 %q
store i32 %x, i32* %i
ret void
@@ -45,14 +46,6 @@
ret void
}
-define ptx_device void @t4_const(i32 %x) {
-entry:
-;CHECK: st.const.s32 [array_constant], r1;
- %i = getelementptr [10 x i32] addrspace(1)* @array_constant, i32 0, i32 0
- store i32 %x, i32 addrspace(1)* %i
- ret void
-}
-
define ptx_device void @t4_local(i32 %x) {
entry:
;CHECK: st.local.s32 [array_local], r1;
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