[llvm-commits] [llvm] r122277 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h X86InstrFragmentsSIMD.td X86InstrSSE.td

Bruno Cardoso Lopes bruno.cardoso at gmail.com
Mon Dec 20 17:18:43 PST 2010


Thanks Nate! :)

On Mon, Dec 20, 2010 at 8:04 PM, Nate Begeman <natebegeman at mac.com> wrote:
> Author: sampo
> Date: Mon Dec 20 16:04:24 2010
> New Revision: 122277
>
> URL: http://llvm.org/viewvc/llvm-project?rev=122277&view=rev
> Log:
> Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
> lowering to use it.  Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>    llvm/trunk/lib/Target/X86/X86ISelLowering.h
>    llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
>    llvm/trunk/lib/Target/X86/X86InstrSSE.td
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=122277&r1=122276&r2=122277&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Dec 20 16:04:24 2010
> @@ -8398,9 +8398,7 @@
>     M = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
>                     DAG.getConstant(Intrinsic::x86_sse2_pslli_w, MVT::i32), M,
>                     DAG.getConstant(4, MVT::i32));
> -    R = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
> -                    DAG.getConstant(Intrinsic::x86_sse41_pblendvb, MVT::i32),
> -                    R, M, Op);
> +    R = DAG.getNode(X86ISD::PBLENDVB, dl, VT, R, M, Op);
>     // a += a
>     Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);
>
> @@ -8415,15 +8413,12 @@
>     M = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
>                     DAG.getConstant(Intrinsic::x86_sse2_pslli_w, MVT::i32), M,
>                     DAG.getConstant(2, MVT::i32));
> -    R = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
> -                    DAG.getConstant(Intrinsic::x86_sse41_pblendvb, MVT::i32),
> -                    R, M, Op);
> +    R = DAG.getNode(X86ISD::PBLENDVB, dl, VT, R, M, Op);
>     // a += a
>     Op = DAG.getNode(ISD::ADD, dl, VT, Op, Op);
>
>     // return pblendv(r, r+r, a);
> -    R = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT,
> -                    DAG.getConstant(Intrinsic::x86_sse41_pblendvb, MVT::i32),
> +    R = DAG.getNode(X86ISD::PBLENDVB, dl, VT,
>                     R, DAG.getNode(ISD::ADD, dl, VT, R, R), Op);
>     return R;
>   }
> @@ -8897,6 +8892,7 @@
>   case X86ISD::PSIGNB:             return "X86ISD::PSIGNB";
>   case X86ISD::PSIGNW:             return "X86ISD::PSIGNW";
>   case X86ISD::PSIGND:             return "X86ISD::PSIGND";
> +  case X86ISD::PBLENDVB:           return "X86ISD::PBLENDVB";
>   case X86ISD::FMAX:               return "X86ISD::FMAX";
>   case X86ISD::FMIN:               return "X86ISD::FMIN";
>   case X86ISD::FRSQRT:             return "X86ISD::FRSQRT";
> @@ -11209,12 +11205,10 @@
>         if (!Subtarget->hasSSE41())
>           return SDValue();
>
> -        unsigned IID = Intrinsic::x86_sse41_pblendvb;
>         X = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, X);
>         Y = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Y);
>         Mask = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Mask);
> -        Mask = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, MVT::v16i8,
> -                           DAG.getConstant(IID, MVT::i32), X, Y, Mask);
> +        Mask = DAG.getNode(X86ISD::PBLENDVB, DL, MVT::v16i8, X, Y, Mask);
>         return DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, Mask);
>       }
>     }
>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=122277&r1=122276&r2=122277&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Dec 20 16:04:24 2010
> @@ -166,6 +166,9 @@
>       /// PSIGNB/W/D - Copy integer sign.
>       PSIGNB, PSIGNW, PSIGND,
>
> +      /// PBLENDVB - Variable blend
> +      PBLENDVB,
> +
>       /// FMAX, FMIN - Floating point max and min.
>       ///
>       FMAX, FMIN,
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=122277&r1=122276&r2=122277&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Mon Dec 20 16:04:24 2010
> @@ -55,6 +55,9 @@
>  def X86psignd  : SDNode<"X86ISD::PSIGND",
>                  SDTypeProfile<1, 2, [SDTCisVT<0, v4i32>, SDTCisSameAs<0,1>,
>                                       SDTCisSameAs<0,2>]>>;
> +def X86pblendv : SDNode<"X86ISD::PBLENDVB",
> +                 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
> +                                      SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>>;
>  def X86pextrb  : SDNode<"X86ISD::PEXTRB",
>                  SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
>  def X86pextrw  : SDNode<"X86ISD::PEXTRW",
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=122277&r1=122276&r2=122277&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Dec 20 16:04:24 2010
> @@ -4855,6 +4855,9 @@
>  defm BLENDVPS     : SS41I_ternary_int<0x14, "blendvps", int_x86_sse41_blendvps>;
>  defm PBLENDVB     : SS41I_ternary_int<0x10, "pblendvb", int_x86_sse41_pblendvb>;
>
> +def : Pat<(X86pblendv VR128:$src1, VR128:$src2, XMM0),
> +          (PBLENDVBrr0 VR128:$src1, VR128:$src2)>;
> +
>  let isAsmParserOnly = 1, Predicates = [HasAVX] in
>  def VMOVNTDQArm : SS48I<0x2A, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
>                        "vmovntdqa\t{$src, $dst|$dst, $src}",
>
>
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-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc




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