[llvm-commits] [llvm] r122259 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/x86_64-mul-by-const.ll
Dale Johannesen
dalej at apple.com
Mon Dec 20 12:10:50 PST 2010
Author: johannes
Date: Mon Dec 20 14:10:50 2010
New Revision: 122259
URL: http://llvm.org/viewvc/llvm-project?rev=122259&view=rev
Log:
Cosmetic changes.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/test/CodeGen/X86/x86_64-mul-by-const.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=122259&r1=122258&r2=122259&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Dec 20 14:10:50 2010
@@ -3172,15 +3172,15 @@
}
// fold (srl (trunc (srl x, c1)), c2) -> 0 or (trunc (srl x, (add c1, c2)))
- // This is only valid if the OpSizeInBits + c1 = size of inner shift
if (N1C && N0.getOpcode() == ISD::TRUNCATE &&
N0.getOperand(0).getOpcode() == ISD::SRL &&
- N0.getOperand(0)->getOperand(1).getOpcode() == ISD::Constant) {
+ isa<ConstantSDNode>(N0.getOperand(0)->getOperand(1))) {
uint64_t c1 =
cast<ConstantSDNode>(N0.getOperand(0)->getOperand(1))->getZExtValue();
uint64_t c2 = N1C->getZExtValue();
EVT InnerShiftVT = N0.getOperand(0)->getOperand(1).getValueType();
uint64_t InnerShiftSize = InnerShiftVT.getScalarType().getSizeInBits();
+ // This is only valid if the OpSizeInBits + c1 = size of inner shift.
if (c1 + OpSizeInBits == InnerShiftSize) {
if (c1 + c2 >= InnerShiftSize)
return DAG.getConstant(0, VT);
Modified: llvm/trunk/test/CodeGen/X86/x86_64-mul-by-const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86_64-mul-by-const.ll?rev=122259&r1=122258&r2=122259&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86_64-mul-by-const.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86_64-mul-by-const.ll Mon Dec 20 14:10:50 2010
@@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-; Formerly there were two shifts. 8771012.
+; Formerly there were two shifts. rdar://8771012.
define i32 @f9188_mul365384439_shift27(i32 %A) nounwind {
; CHECK: imulq $365384439,
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