[llvm-commits] [llvm] r122154 - /llvm/trunk/test/CodeGen/X86/vec-sign.ll
Benjamin Kramer
benny.kra at googlemail.com
Sat Dec 18 06:23:57 PST 2010
Author: d0k
Date: Sat Dec 18 08:23:57 2010
New Revision: 122154
URL: http://llvm.org/viewvc/llvm-project?rev=122154&view=rev
Log:
Just rename the functions, relying on matching a instruction that has the same name as a symbol is way too fragile.
Modified:
llvm/trunk/test/CodeGen/X86/vec-sign.ll
Modified: llvm/trunk/test/CodeGen/X86/vec-sign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec-sign.ll?rev=122154&r1=122153&r2=122154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec-sign.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec-sign.ll Sat Dec 18 08:23:57 2010
@@ -1,8 +1,8 @@
; RUN: llc < %s -march=x86 -mcpu=nehalem | FileCheck %s
-define <4 x i32> @psignd(<4 x i32> %a, <4 x i32> %b) nounwind ssp {
+define <4 x i32> @signd(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
-; CHECK: psignd:
+; CHECK: signd:
; CHECK: psignd
; CHECK-NOT: sub
; CHECK: ret
@@ -15,9 +15,9 @@
ret <4 x i32> %cond
}
-define <4 x i32> @pblendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind ssp {
+define <4 x i32> @blendvb(<4 x i32> %b, <4 x i32> %a, <4 x i32> %c) nounwind {
entry:
-; CHECK: pblendvb:
+; CHECK: blendvb:
; CHECK: pblendvb
; CHECK: ret
%b.lobit = ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
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