[llvm-commits] [llvm] r121808 - /llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

[Bill Wendling]

Author: void
Date: Tue Dec 14 17:40:49 2010
New Revision: 121808

URL: http://llvm.org/viewvc/llvm-project?rev=121808&view=rev
Log:
Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]


Modified:
    llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=121808&r1=121807&r2=121808&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Dec 14 17:40:49 2010
@@ -918,27 +918,15 @@
       return false;  // We want to select tLDRpci instead.
   }
 
-  if (N.getOpcode() != ISD::ADD) {
-    if (N.getOpcode() == ARMISD::Wrapper &&
-        (!Subtarget->useMovt() ||
-         N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress))
-      Base = N.getOperand(0);
-    else
-      Base = N;
-
-    Offset = CurDAG->getRegister(0, MVT::i32);
-    return true;
-  }
+  if (N.getOpcode() != ISD::ADD)
+    return false;
 
   // Thumb does not have [sp, r] address mode.
   RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0));
   RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1));
   if ((LHSR && LHSR->getReg() == ARM::SP) ||
-      (RHSR && RHSR->getReg() == ARM::SP)) {
-    Base = N;
-    Offset = CurDAG->getRegister(0, MVT::i32);
-    return true;
-  }
+      (RHSR && RHSR->getReg() == ARM::SP))
+    return false;
 
   if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
     int RHSC = (int)RHS->getZExtValue();
@@ -1003,6 +991,23 @@
     return true;
   }
 
+  RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0));
+  RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1));
+  if ((LHSR && LHSR->getReg() == ARM::SP) ||
+      (RHSR && RHSR->getReg() == ARM::SP)) {
+    ConstantSDNode *LHS = dyn_cast<ConstantSDNode>(N.getOperand(0));
+    ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1));
+    unsigned LHSC = LHS ? LHS->getZExtValue() : 0;
+    unsigned RHSC = RHS ? RHS->getZExtValue() : 0;
+
+    // Thumb does not have [sp, #imm5] address mode for non-zero imm5.
+    if (LHSC != 0 || RHSC != 0) return false;
+
+    Base = N;
+    OffImm = CurDAG->getTargetConstant(0, MVT::i32);
+    return true;
+  }
+
   // If the RHS is + imm5 * scale, fold into addr mode.
   if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
     int RHSC = (int)RHS->getZExtValue();