[llvm-commits] [llvm] r121594 - /llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Nick Lewycky
nicholas at mxc.ca
Fri Dec 10 15:05:10 PST 2010
Author: nicholas
Date: Fri Dec 10 17:05:10 2010
New Revision: 121594
URL: http://llvm.org/viewvc/llvm-project?rev=121594&view=rev
Log:
Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]
Modified:
llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=121594&r1=121593&r2=121594&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Fri Dec 10 17:05:10 2010
@@ -230,8 +230,10 @@
SmallVector<unsigned, 8> PhysRegSpillCands, ReassignCands;
// Check for an available register in this class.
- const TargetRegisterClass *TRC = MRI->getRegClass(VirtReg.reg);
- DEBUG(dbgs() << "RegClass: " << TRC->getName() << ' ');
+ DEBUG({
+ const TargetRegisterClass *TRC = MRI->getRegClass(VirtReg.reg);
+ dbgs() << "RegClass: " << TRC->getName() << ' ');
+ });
AllocationOrder Order(VirtReg.reg, *VRM, ReservedRegs);
while (unsigned PhysReg = Order.next()) {
@@ -324,4 +326,3 @@
return true;
}
-
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