[llvm-commits] [llvm] r121404 - in /llvm/trunk/lib: MC/ELFObjectWriter.cpp Target/ARM/ARMAsmBackend.cpp Target/ARM/ARMFixupKinds.h Target/ARM/ARMMCCodeEmitter.cpp

[Jim Grosbach]

Author: grosbach
Date: Thu Dec  9 13:50:12 2010
New Revision: 121404

URL: http://llvm.org/viewvc/llvm-project?rev=121404&view=rev
Log:
Rename CB/CBZ specific fixup accordingly.

Modified:
    llvm/trunk/lib/MC/ELFObjectWriter.cpp
    llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp
    llvm/trunk/lib/Target/ARM/ARMFixupKinds.h
    llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp

Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=121404&r1=121403&r2=121404&view=diff
==============================================================================
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Thu Dec  9 13:50:12 2010
@@ -1556,7 +1556,7 @@
     case ARM::fixup_arm_pcrel_10:
     case ARM::fixup_arm_adr_pcrel_12:
     case ARM::fixup_arm_thumb_bl:
-    case ARM::fixup_arm_thumb_br:
+    case ARM::fixup_arm_thumb_cb:
     case ARM::fixup_arm_thumb_cp:
       assert(0 && "Unimplemented"); break;
     case ARM::fixup_arm_branch:

Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp?rev=121404&r1=121403&r2=121404&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp Thu Dec  9 13:50:12 2010
@@ -194,7 +194,7 @@
     // 'off by 4' is implicitly handled by the half-word ordering of the
     // Thumb encoding, so we only need to adjust by 2 here.
     return ((Value - 2) >> 2) & 0xff;
-  case ARM::fixup_arm_thumb_br: {
+  case ARM::fixup_arm_thumb_cb: {
     // Offset by 4 and don't encode the lower bit, which is always 0.
     uint32_t Binary = (Value - 4) >> 1;
     return ((Binary & 0x20) << 9) | ((Binary & 0x1f) << 3);
@@ -312,7 +312,7 @@
   case ARM::fixup_arm_thumb_cp:
     return 1;
 
-  case ARM::fixup_arm_thumb_br:
+  case ARM::fixup_arm_thumb_cb:
     return 2;
 
   case ARM::fixup_arm_ldst_pcrel_12:

Modified: llvm/trunk/lib/Target/ARM/ARMFixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFixupKinds.h?rev=121404&r1=121403&r2=121404&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFixupKinds.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMFixupKinds.h Thu Dec  9 13:50:12 2010
@@ -46,8 +46,8 @@
   // fixup_arm_thumb_blx - Fixup for Thumb BLX instructions.
   fixup_arm_thumb_blx,
 
-  // fixup_arm_thumb_br - Fixup for Thumb branch instructions.
-  fixup_arm_thumb_br,
+  // fixup_arm_thumb_cb - Fixup for Thumb branch instructions.
+  fixup_arm_thumb_cb,
 
   // fixup_arm_thumb_cp - Fixup for Thumb load/store from constant pool instrs.
   fixup_arm_thumb_cp,

Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=121404&r1=121403&r2=121404&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Thu Dec  9 13:50:12 2010
@@ -55,7 +55,7 @@
       { "fixup_t2_branch",          0,    32,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_thumb_bl",       0,    32,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_thumb_blx",      0,    32,   MCFixupKindInfo::FKF_IsPCRel },
-      { "fixup_arm_thumb_br",       0,    16,   MCFixupKindInfo::FKF_IsPCRel },
+      { "fixup_arm_thumb_cb",       0,    16,   MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_thumb_cp",       1,    8,    MCFixupKindInfo::FKF_IsPCRel },
       { "fixup_arm_movt_hi16",      0,    16,   0 },
       { "fixup_arm_movw_lo16",      0,    16,   0 },
@@ -462,7 +462,7 @@
 uint32_t ARMMCCodeEmitter::
 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx,
                         SmallVectorImpl<MCFixup> &Fixups) const {
-  return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_br, Fixups);
+  return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cb, Fixups);
 }
 
 /// getBranchTargetOpValue - Return encoding info for 24-bit immediate branch