[llvm-commits] [llvm] r121314 - /llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

[Jim Grosbach]

Author: grosbach
Date: Wed Dec  8 17:24:29 2010
New Revision: 121314

URL: http://llvm.org/viewvc/llvm-project?rev=121314&view=rev
Log:
Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=121314&r1=121313&r2=121314&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Dec  8 17:24:29 2010
@@ -285,9 +285,13 @@
   : T2I<oops, iops, itin, opc, asm, pattern> {
   bits<4> Rd;
   bits<4> Rn;
+  bits<12> imm;
 
   let Inst{11-8}  = Rd;
-  let Inst{3-0}   = Rn;
+  let Inst{19-16} = Rn;
+  let Inst{26}    = imm{11};
+  let Inst{14-12} = imm{10-8};
+  let Inst{7-0}   = imm{7-0};
 }
 
 class T2sTwoRegImm<dag oops, dag iops, InstrItinClass itin,
@@ -1159,18 +1163,12 @@
   let Inst{19-16} = 0b1101; // Rn = sp
   let Inst{15} = 0;
 }
-def t2ADDrSPi12 : T2I<(outs GPR:$Rd), (ins GPR:$sp, imm0_4095:$imm),
-                       IIC_iALUi, "addw", "\t$Rd, $sp, $imm", []> {
-  bits<4> Rd;
-  bits<12> imm;
+def t2ADDrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm),
+                       IIC_iALUi, "addw", "\t$Rd, $Rn, $imm", []> {
   let Inst{31-27} = 0b11110;
-  let Inst{26} = imm{11};
   let Inst{25-20} = 0b100000;
   let Inst{19-16} = 0b1101; // Rn = sp
   let Inst{15} = 0;
-  let Inst{14-12} = imm{10-8};
-  let Inst{11-8} = Rd;
-  let Inst{7-0} = imm{7-0};
 }
 
 // ADD r, sp, so_reg
@@ -1180,7 +1178,6 @@
   let Inst{31-27} = 0b11101;
   let Inst{26-25} = 0b01;
   let Inst{24-21} = 0b1000;
-  let Inst{19-16} = 0b1101; // Rn = sp
   let Inst{15} = 0;
 }
 
@@ -1193,18 +1190,11 @@
   let Inst{19-16} = 0b1101; // Rn = sp
   let Inst{15} = 0;
 }
-def t2SUBrSPi12 : T2I<(outs GPR:$Rd), (ins GPR:$sp, imm0_4095:$imm),
-                       IIC_iALUi, "subw", "\t$Rd, $sp, $imm", []> {
-  bits<4> Rd;
-  bits<12> imm;
+def t2SUBrSPi12 : T2TwoRegImm<(outs GPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm),
+                       IIC_iALUi, "subw", "\t$Rd, $Rn, $imm", []> {
   let Inst{31-27} = 0b11110;
-  let Inst{26} = imm{11};
   let Inst{25-20} = 0b101010;
-  let Inst{19-16} = 0b1101; // Rn = sp
   let Inst{15} = 0;
-  let Inst{14-12} = imm{10-8};
-  let Inst{11-8} = Rd;
-  let Inst{7-0} = imm{7-0};
 }
 
 // SUB r, sp, so_reg