[llvm-commits] [llvm] r121219 - in /llvm/trunk: include/llvm/Target/TargetAsmBackend.h lib/MC/MCMachOStreamer.cpp lib/Target/ARM/ARMAsmBackend.cpp

[Jim Grosbach]

Author: grosbach
Date: Tue Dec  7 19:16:55 2010
New Revision: 121219

URL: http://llvm.org/viewvc/llvm-project?rev=121219&view=rev
Log:
Let target asm backends see assembler flags as they go by. Use that to handle
thumb vs. arm mode differences in WriteNopData().

Modified:
    llvm/trunk/include/llvm/Target/TargetAsmBackend.h
    llvm/trunk/lib/MC/MCMachOStreamer.cpp
    llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp

Modified: llvm/trunk/include/llvm/Target/TargetAsmBackend.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetAsmBackend.h?rev=121219&r1=121218&r2=121219&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetAsmBackend.h (original)
+++ llvm/trunk/include/llvm/Target/TargetAsmBackend.h Tue Dec  7 19:16:55 2010
@@ -10,6 +10,7 @@
 #ifndef LLVM_TARGET_TARGETASMBACKEND_H
 #define LLVM_TARGET_TARGETASMBACKEND_H
 
+#include "llvm/MC/MCDirectives.h"
 #include "llvm/Support/DataTypes.h"
 
 namespace llvm {
@@ -109,6 +110,10 @@
   ///
   /// \return - True on success.
   virtual bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const = 0;
+
+  /// HandleAssemblerFlag - Handle any target-specific assembler flags.
+  /// By default, do nothing.
+  virtual void HandleAssemblerFlag(MCAssemblerFlag Flag) {}
 };
 
 } // End llvm namespace

Modified: llvm/trunk/lib/MC/MCMachOStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCMachOStreamer.cpp?rev=121219&r1=121218&r2=121219&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCMachOStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCMachOStreamer.cpp Tue Dec  7 19:16:55 2010
@@ -124,6 +124,9 @@
 }
 
 void MCMachOStreamer::EmitAssemblerFlag(MCAssemblerFlag Flag) {
+  // Let the target do whatever target specific stuff it needs to do.
+  getAssembler().getBackend().HandleAssemblerFlag(Flag);
+  // Do any generic stuff we need to do.
   switch (Flag) {
   case MCAF_SyntaxUnified: return; // no-op here.
   case MCAF_Code16: return; // no-op here.

Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp?rev=121219&r1=121218&r2=121219&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp Tue Dec  7 19:16:55 2010
@@ -12,6 +12,7 @@
 #include "ARMFixupKinds.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCDirectives.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCObjectFormat.h"
 #include "llvm/MC/MCObjectWriter.h"
@@ -27,6 +28,7 @@
 
 namespace {
 class ARMAsmBackend : public TargetAsmBackend {
+  bool isThumbMode;  // Currently emitting Thumb code.
 public:
   ARMAsmBackend(const Target &T) : TargetAsmBackend() {}
 
@@ -36,9 +38,21 @@
 
   bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
 
-  unsigned getPointerSize() const {
-    return 4;
+  void HandleAssemblerFlag(MCAssemblerFlag Flag) {
+    switch (Flag) {
+    default: break;
+    case MCAF_Code16:
+      setIsThumb(true);
+      break;
+    case MCAF_Code32:
+      setIsThumb(false);
+      break;
+    }
   }
+
+  unsigned getPointerSize() const { return 4; }
+  bool isThumb() const { return isThumbMode; }
+  void setIsThumb(bool it) { isThumbMode = it; }
 };
 } // end anonymous namespace
 
@@ -53,10 +67,19 @@
 }
 
 bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
-  // FIXME: Zero fill for now. That's not right, but at least will get the
-  // section size right.
+  if (isThumb()) {
+    assert (((Count & 1) == 0) && "Unaligned Nop data fragment!");
+    // FIXME: 0xbf00 is the ARMv7 value. For v6 and before, we'll need to
+    // use 0x46c0 (which is a 'mov r8, r8' insn).
+    Count /= 2;
+    for (uint64_t i = 0; i != Count; ++i)
+      OW->Write16(0xbf00);
+    return true;
+  }
+  // ARM mode
+  Count /= 4;
   for (uint64_t i = 0; i != Count; ++i)
-    OW->Write8(0);
+    OW->Write32(0xe1a00000);
   return true;
 }