[llvm-commits] [llvm] r120928 - in /llvm/trunk/test/CodeGen/X86: 2007-10-16-fp80_select.ll const-select.ll select.ll sext-select.ll split-select.ll vec_select.ll widen_select-1.ll
Chris Lattner
sabre at nondot.org
Sat Dec 4 17:13:58 PST 2010
Author: lattner
Date: Sat Dec 4 19:13:58 2010
New Revision: 120928
URL: http://llvm.org/viewvc/llvm-project?rev=120928&view=rev
Log:
merge some tests into select.ll and make them more specific.
Removed:
llvm/trunk/test/CodeGen/X86/2007-10-16-fp80_select.ll
llvm/trunk/test/CodeGen/X86/const-select.ll
llvm/trunk/test/CodeGen/X86/sext-select.ll
llvm/trunk/test/CodeGen/X86/split-select.ll
llvm/trunk/test/CodeGen/X86/vec_select.ll
llvm/trunk/test/CodeGen/X86/widen_select-1.ll
Modified:
llvm/trunk/test/CodeGen/X86/select.ll
Removed: llvm/trunk/test/CodeGen/X86/2007-10-16-fp80_select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-16-fp80_select.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-16-fp80_select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-16-fp80_select.ll (removed)
@@ -1,19 +0,0 @@
-; RUN: llc < %s -march=x86
-; ModuleID = 'bugpoint-reduced-simplified.bc'
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i686-apple-darwin9"
- %struct.wxPoint2DInt = type { i32, i32 }
-
-define x86_fp80 @_ZNK12wxPoint2DInt14GetVectorAngleEv(%struct.wxPoint2DInt* %this) {
-entry:
- br i1 false, label %cond_true, label %UnifiedReturnBlock
-
-cond_true: ; preds = %entry
- %tmp8 = load i32* null, align 4 ; <i32> [#uses=1]
- %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1]
- %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 ; <x86_fp80> [#uses=1]
- ret x86_fp80 %retval
-
-UnifiedReturnBlock: ; preds = %entry
- ret x86_fp80 0xK4005B400000000000000
-}
Removed: llvm/trunk/test/CodeGen/X86/const-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/const-select.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/const-select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/const-select.ll (removed)
@@ -1,22 +0,0 @@
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin7"
-
-; RUN: llc < %s | grep {LCPI0_0(,%eax,4)}
-define float @f(i32 %x) nounwind readnone {
-entry:
- %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1]
- ret float %iftmp.0.0
-}
-
-; RUN: llc < %s | grep {movsbl.*(%e.x,%e.x,4), %eax}
-define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
-entry:
- %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1]
- %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1]
- %2 = load i8* %1, align 1 ; <i8> [#uses=1]
- ret i8 %2
-}
-
Modified: llvm/trunk/test/CodeGen/X86/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select.ll?rev=120928&r1=120927&r2=120928&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select.ll Sat Dec 4 19:13:58 2010
@@ -1,15 +1,99 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; PR5757
-; CHECK: cmovneq %rdi, %rsi
-; CHECK: movl (%rsi), %eax
-
%0 = type { i64, i32 }
-define i32 @foo(%0* %p, %0* %q, i1 %r) nounwind {
+define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
%t0 = load %0* %p
%t1 = load %0* %q
%t4 = select i1 %r, %0 %t0, %0 %t1
%t5 = extractvalue %0 %t4, 1
ret i32 %t5
+; CHECK: test1:
+; CHECK: cmovneq %rdi, %rsi
+; CHECK: movl (%rsi), %eax
+}
+
+
+; PR2139
+define i32 @test2() nounwind {
+entry:
+ %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1]
+ %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2]
+ %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1]
+ %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2]
+ %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1]
+ br i1 %tmp87, label %bb90, label %bb91
+bb90: ; preds = %bb84, %bb72
+ unreachable
+bb91: ; preds = %bb84
+ ret i32 0
+; CHECK: test2:
+; CHECK: movnew
+; CHECK: movswl
+}
+
+declare i1 @return_false()
+
+
+;; Select between two floating point constants.
+define float @test3(i32 %x) nounwind readnone {
+entry:
+ %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1]
+ ret float %iftmp.0.0
+; CHECK: test3:
+; CHECK: movss ({{.*}},4), %xmm0
+}
+
+define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
+entry:
+ %0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1]
+ %1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1]
+ %2 = load i8* %1, align 1 ; <i8> [#uses=1]
+ ret i8 %2
+; CHECK: test4:
+; CHECK: movsbl ({{.*}},4), %eax
+}
+
+define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
+ %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
+ store <2 x i16> %x, <2 x i16>* %p
+ ret void
+; CHECK: test5:
+}
+
+define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
+ %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1]
+ %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2]
+ %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1]
+ %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1]
+ %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1]
+ store <4 x float> %iftmp.38.0, <4 x float>* %A
+ ret void
+; Verify that the fmul gets sunk into the one part of the diamond where it is
+; needed.
+; CHECK: test6:
+; CHECK: jne
+; CHECK: mulps
+; CHECK: ret
+; CHECK: ret
+}
+
+; Select with fp80's
+define x86_fp80 @test7(i32 %tmp8) nounwind {
+ %tmp9 = icmp sgt i32 %tmp8, -1 ; <i1> [#uses=1]
+ %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
+ ret x86_fp80 %retval
+; CHECK: leaq
+; CHECK: fldt (%r{{.}}x,%r{{.}}x)
+}
+
+; widening select v6i32 and then a sub
+define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
+ %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
+ %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
+ store <6 x i32> %val, <6 x i32>* %dst.addr
+ ret void
}
Removed: llvm/trunk/test/CodeGen/X86/sext-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sext-select.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sext-select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sext-select.ll (removed)
@@ -1,23 +0,0 @@
-; RUN: llc < %s -march=x86 | grep movsw
-; PR2139
-
-declare void @abort()
-
-define i32 @main() {
-entry:
- %tmp73 = tail call i1 @return_false() ; <i8> [#uses=1]
- %g.0 = select i1 %tmp73, i16 0, i16 -480 ; <i16> [#uses=2]
- %tmp7778 = sext i16 %g.0 to i32 ; <i32> [#uses=1]
- %tmp80 = shl i32 %tmp7778, 3 ; <i32> [#uses=2]
- %tmp87 = icmp sgt i32 %tmp80, 32767 ; <i1> [#uses=1]
- br i1 %tmp87, label %bb90, label %bb91
-bb90: ; preds = %bb84, %bb72
- tail call void @abort()
- unreachable
-bb91: ; preds = %bb84
- ret i32 0
-}
-
-define i1 @return_false() {
- ret i1 0
-}
Removed: llvm/trunk/test/CodeGen/X86/split-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/split-select.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/split-select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/split-select.ll (removed)
@@ -1,7 +0,0 @@
-; RUN: llc < %s -march=x86-64 | grep test | count 1
-
-define void @foo(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) {
- %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
- store <2 x i16> %x, <2 x i16>* %p
- ret void
-}
Removed: llvm/trunk/test/CodeGen/X86/vec_select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_select.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_select.ll (removed)
@@ -1,12 +0,0 @@
-; RUN: llc < %s -march=x86 -mattr=+sse
-
-define void @test(i32 %C, <4 x float>* %A, <4 x float>* %B) {
- %tmp = load <4 x float>* %A ; <<4 x float>> [#uses=1]
- %tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=2]
- %tmp9 = fmul <4 x float> %tmp3, %tmp3 ; <<4 x float>> [#uses=1]
- %tmp.upgrd.1 = icmp eq i32 %C, 0 ; <i1> [#uses=1]
- %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp ; <<4 x float>> [#uses=1]
- store <4 x float> %iftmp.38.0, <4 x float>* %A
- ret void
-}
-
Removed: llvm/trunk/test/CodeGen/X86/widen_select-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_select-1.ll?rev=120927&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/widen_select-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/widen_select-1.ll (removed)
@@ -1,12 +0,0 @@
-; RUN: llc < %s -march=x86 -mattr=+sse42 -disable-mmx | FileCheck %s
-; CHECK: je
-
-; widening select v6i32 and then a sub
-
-define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
-entry:
- %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
- %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
- store <6 x i32> %val, <6 x i32>* %dst.addr
- ret void
-}
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