[llvm-commits] [llvm] r120574 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Duncan Sands]

Author: baldrick
Date: Wed Dec  1 06:58:13 2010
New Revision: 120574

URL: http://llvm.org/viewvc/llvm-project?rev=120574&view=rev
Log:
I don't think it makes any sense to assert that the target supports SSE3 here.
The user (i.e. whoever generated a call to the intrinsic in the first place) is
essentially asking for a particular instruction to be placed in the assembler.
If that instruction won't execute on the target machine, that's their problem
not ours.  Two buildbots with processors that don't support SSE3 were barfing
on the apm.ll test in CodeGen/X86 because of this assertion.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=120574&r1=120573&r2=120574&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Dec  1 06:58:13 2010
@@ -9459,8 +9459,6 @@
 
 MachineBasicBlock *
 X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const {
-  assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled");
-  
   DebugLoc dl = MI->getDebugLoc();
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
   
@@ -9486,8 +9484,6 @@
 
 MachineBasicBlock *
 X86TargetLowering::EmitMwait(MachineInstr *MI, MachineBasicBlock *BB) const {
-  assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled");
-  
   DebugLoc dl = MI->getDebugLoc();
   const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();