[llvm-commits] [llvm] r120288 - in /llvm/trunk: lib/Target/CellSPU/SPUInstrInfo.td test/CodeGen/CellSPU/shift_ops.ll

[Kalle Raiskila]

Author: kraiskil
Date: Mon Nov 29 08:44:28 2010
New Revision: 120288

URL: http://llvm.org/viewvc/llvm-project?rev=120288&view=rev
Log:
Handle lshr for i128 correctly on SPU also when 
shiftamount > 7.

Modified:
    llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td
    llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll

Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=120288&r1=120287&r2=120288&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Mon Nov 29 08:44:28 2010
@@ -2727,6 +2727,8 @@
   def v8i16: ROTQMBYBIVecInst<v8i16>;
   def v4i32: ROTQMBYBIVecInst<v4i32>;
   def v2i64: ROTQMBYBIVecInst<v2i64>;
+  def r128: ROTQMBYBIInst<(outs GPRC:$rT), (ins GPRC:$rA, R32C:$rB),
+                           [/*no pattern*/]>;
 }
 
 defm ROTQMBYBI: RotateMaskQuadByBitCount;
@@ -2762,8 +2764,9 @@
 defm ROTQMBI: RotateMaskQuadByBits;
 
 def : Pat<(srl GPRC:$rA, R32C:$rB),
-          (ROTQMBIr128  GPRC:$rA, 
-                        (SFIr32 R32C:$rB, 0))>;
+          (ROTQMBYBIr128 (ROTQMBIr128  GPRC:$rA, 
+                                       (SFIr32 R32C:$rB, 0)),
+                         (SFIr32 R32C:$rB, 0))>;
 
 
 //-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~-~

Modified: llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll?rev=120288&r1=120287&r2=120288&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/shift_ops.ll Mon Nov 29 08:44:28 2010
@@ -10,11 +10,12 @@
 ; RUN: grep {rotqmbyi	}  %t1.s | count 1
 ; RUN: grep {rotqmbii	}  %t1.s | count 2
 ; RUN: grep {rotqmby	}  %t1.s | count 1
-; RUN: grep {rotqmbi	}  %t1.s | count 1
+; RUN: grep {rotqmbi	}  %t1.s | count 2
 ; RUN: grep {rotqbyi	}  %t1.s | count 1
 ; RUN: grep {rotqbii	}  %t1.s | count 2
 ; RUN: grep {rotqbybi	}  %t1.s | count 1
-; RUN: grep {sfi	}  %t1.s | count 3
+; RUN: grep {sfi	}  %t1.s | count 4
+; RUN: cat %t1.s | FileCheck %s
 
 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
 target triple = "spu"
@@ -281,3 +282,14 @@
 	%2 = trunc i64 %1 to i32
 	ret i32 %2
 }
+
+; some random tests
+define i128 @test_lshr_i128( i128 %val ) {
+ 	;CHECK: test_lshr_i128
+	;CHECK: sfi
+	;CHECK: rotqmbi
+	;CHECK: rotqmbybi
+	;CHECK: bi $lr
+	%rv = lshr i128 %val, 64
+	ret i128 %rv
+}