[llvm-commits] [llvm] r120279 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb.td test/MC/ARM/thumb.s

[Bill Wendling]

Author: void
Date: Sun Nov 28 19:07:48 2010
New Revision: 120279

URL: http://llvm.org/viewvc/llvm-project?rev=120279&view=rev
Log:
Add more Thumb encodings.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
    llvm/trunk/test/MC/ARM/thumb.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=120279&r1=120278&r2=120279&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Sun Nov 28 19:07:48 2010
@@ -1177,24 +1177,42 @@
 
 // test
 let isCompare = 1, isCommutable = 1, Defs = [CPSR] in
-def tTST  : T1pI<(outs), (ins tGPR:$lhs, tGPR:$rhs), IIC_iTSTr,
-                 "tst", "\t$lhs, $rhs",
-                 [(ARMcmpZ (and_su tGPR:$lhs, tGPR:$rhs), 0)]>,
-            T1DataProcessing<0b1000>;
+def tTST  : T1pI<(outs), (ins tGPR:$Rn, tGPR:$Rm), IIC_iTSTr,
+                 "tst", "\t$Rn, $Rm",
+                 [(ARMcmpZ (and_su tGPR:$Rn, tGPR:$Rm), 0)]>,
+            T1DataProcessing<0b1000> {
+  // A8.6.230
+  bits<3> Rm;
+  bits<3> Rn;
+  let Inst{5-3} = Rm;
+  let Inst{2-0} = Rn;
+}
 
 // zero-extend byte
-def tUXTB  : T1pI<(outs tGPR:$dst), (ins tGPR:$src), IIC_iUNAr,
-                  "uxtb", "\t$dst, $src",
-                  [(set tGPR:$dst, (and tGPR:$src, 0xFF))]>,
+def tUXTB  : T1pI<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iUNAr,
+                  "uxtb", "\t$Rd, $Rm",
+                  [(set tGPR:$Rd, (and tGPR:$Rm, 0xFF))]>,
                   Requires<[IsThumb, IsThumb1Only, HasV6]>,
-             T1Misc<{0,0,1,0,1,1,?}>;
+             T1Misc<{0,0,1,0,1,1,?}> {
+  // A8.6.262
+  bits<3> Rm;
+  bits<3> Rd;
+  let Inst{5-3} = Rm;
+  let Inst{2-0} = Rd;
+}
 
 // zero-extend short
-def tUXTH  : T1pI<(outs tGPR:$dst), (ins tGPR:$src), IIC_iUNAr,
-                  "uxth", "\t$dst, $src",
-                  [(set tGPR:$dst, (and tGPR:$src, 0xFFFF))]>,
+def tUXTH  : T1pI<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iUNAr,
+                  "uxth", "\t$Rd, $Rm",
+                  [(set tGPR:$Rd, (and tGPR:$Rm, 0xFFFF))]>,
                   Requires<[IsThumb, IsThumb1Only, HasV6]>,
-             T1Misc<{0,0,1,0,1,0,?}>;
+             T1Misc<{0,0,1,0,1,0,?}> {
+  // A8.6.264
+  bits<3> Rm;
+  bits<3> Rd;
+  let Inst{5-3} = Rm;
+  let Inst{2-0} = Rd;
+}
 
 
 // Conditional move tMOVCCr - Used to implement the Thumb SELECT_CC operation.

Modified: llvm/trunk/test/MC/ARM/thumb.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb.s?rev=120279&r1=120278&r2=120279&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb.s (original)
+++ llvm/trunk/test/MC/ARM/thumb.s Sun Nov 28 19:07:48 2010
@@ -24,3 +24,11 @@
 @ CHECK: sxth	r2, r3               @ encoding: [0x1a,0xb2]
 	sxtb	r2, r3
 	sxth	r2, r3
+
+@ CHECK: tst	r4, r5               @ encoding: [0x2c,0x42]
+	tst	r4, r5
+
+@ CHECK: uxtb	r3, r6               @ encoding: [0xf3,0xb2]
+@ CHECK: uxth	r3, r6               @ encoding: [0xb3,0xb2]
+	uxtb	r3, r6
+	uxth	r3, r6