[llvm-commits] [llvm] r119084 - in /llvm/trunk/lib/Target/PowerPC: PPCAsmPrinter.cpp PPCInstrInfo.td

[Chris Lattner]

Author: lattner
Date: Sun Nov 14 16:03:15 2010
New Revision: 119084

URL: http://llvm.org/viewvc/llvm-project?rev=119084&view=rev
Log:
lower PPC::MFCRpseud when transforming to MC, avoiding calling
the aborting printSpecial() method.  This gets us to 8 failures.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=119084&r1=119083&r2=119084&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Sun Nov 14 16:03:15 2010
@@ -554,13 +554,22 @@
 ///
 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   if (UseInstPrinter) {
+    MCInst TmpInst;
+    
     // Lower multi-instruction pseudo operations.
     switch (MI->getOpcode()) {
     default: break;
-    // TODO: implement me.
+        
+    case PPC::MFCRpseud:
+      // Transform: %R3 = MFCRpseud %CR7
+      // Into:      %R3 = MFCR      ;; cr7
+      OutStreamer.AddComment(getRegisterName(MI->getOperand(1).getReg()));
+      TmpInst.setOpcode(PPC::MFCR);
+      TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
+      OutStreamer.EmitInstruction(TmpInst);
+      return;
     }
 
-    MCInst TmpInst;
     LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
     OutStreamer.EmitInstruction(TmpInst);
     return;

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=119084&r1=119083&r2=119084&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Sun Nov 14 16:03:15 2010
@@ -1120,9 +1120,16 @@
 // As it turns out, in all cases where we currently use this,
 // we're only interested in one subregister of it.  Represent this in the
 // instruction to keep the register allocator from becoming confused.
+//
+// FIXME: Make this a real Pseudo instruction when the JIT switches to MC.
 def MFCRpseud: XFXForm_3<31, 19, (outs GPRC:$rT), (ins crbitm:$FXM),
                        "mfcr $rT ${:comment} $FXM", SprMFCR>,
             PPC970_MicroCode, PPC970_Unit_CRU;
+            
+def MFCR : XFXForm_3<31, 19, (outs GPRC:$rT), (ins),
+                     "mfcr $rT", SprMFCR>,
+                     PPC970_MicroCode, PPC970_Unit_CRU;
+
 def MFOCRF: XFXForm_5a<31, 19, (outs GPRC:$rT), (ins crbitm:$FXM),
                        "mfcr $rT, $FXM", SprMFCR>,
             PPC970_DGroup_First, PPC970_Unit_CRU;