[llvm-commits] [llvm] r118965 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Jim Grosbach]

Author: grosbach
Date: Fri Nov 12 19:28:30 2010
New Revision: 118965

URL: http://llvm.org/viewvc/llvm-project?rev=118965&view=rev
Log:
Swap multiclass operand order for consistency with other patterns.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=118965&r1=118964&r2=118965&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Nov 12 19:28:30 2010
@@ -1546,7 +1546,7 @@
                  []>, Requires<[IsARM, HasV5TE]>;
 
 // Indexed loads
-multiclass AI2_ldridx<bit isByte, InstrItinClass itin, string opc> {
+multiclass AI2_ldridx<bit isByte, string opc, InstrItinClass itin> {
   def _PRE  : AI2ldstidx<1, isByte, 1, (outs GPR:$Rt, GPR:$Rn_wb),
                       (ins addrmode2:$addr), IndexModePre, LdFrm, itin,
                       opc, "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> {
@@ -1558,8 +1558,8 @@
                       opc, "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb", []>;
 }
 
-defm LDR  : AI2_ldridx<0, IIC_iLoad_ru, "ldr">;
-defm LDRB : AI2_ldridx<1, IIC_iLoad_bh_ru, "ldrb">;
+defm LDR  : AI2_ldridx<0, "ldr", IIC_iLoad_ru>;
+defm LDRB : AI2_ldridx<1, "ldrb", IIC_iLoad_bh_ru>;
 
 def LDRH_PRE  : AI3ldhpr<(outs GPR:$Rt, GPR:$Rn_wb),
                      (ins addrmode3:$addr), LdMiscFrm, IIC_iLoad_bh_ru,