[llvm-commits] [llvm] r118951 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp test/CodeGen/ARM/select-imm.ll
Evan Cheng
evan.cheng at apple.com
Fri Nov 12 16:27:47 PST 2010
Author: evancheng
Date: Fri Nov 12 18:27:47 2010
New Revision: 118951
URL: http://llvm.org/viewvc/llvm-project?rev=118951&view=rev
Log:
Fix an obvious typo which inverted an immediate.
Modified:
llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/ARM/select-imm.ll
Modified: llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=118951&r1=118950&r2=118951&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelDAGToDAG.cpp Fri Nov 12 18:27:47 2010
@@ -1791,7 +1791,7 @@
return CurDAG->SelectNodeTo(N, (isSoImm ? ARM::t2MOVCCi : ARM::t2MOVCCi16),
MVT::i32, Ops, 5);
} else if (is_t2_so_imm_not(TrueImm)) {
- SDValue True = CurDAG->getTargetConstant(TrueImm, MVT::i32);
+ SDValue True = CurDAG->getTargetConstant(~TrueImm, MVT::i32);
SDValue CC = CurDAG->getTargetConstant(CCVal, MVT::i32);
SDValue Ops[] = { FalseVal, True, CC, CCR, InFlag };
return CurDAG->SelectNodeTo(N, ARM::t2MVNCCi, MVT::i32, Ops, 5);
Modified: llvm/trunk/test/CodeGen/ARM/select-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select-imm.ll?rev=118951&r1=118950&r2=118951&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select-imm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select-imm.ll Fri Nov 12 18:27:47 2010
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
-; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=T2
+; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
+; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s --check-prefix=T2
define i32 @t1(i32 %c) nounwind readnone {
entry:
@@ -25,7 +25,7 @@
; ARM: movle r0, #123
; T2: t2:
-; T2: mov r0, #123
+; T2: mov.w r0, #123
; T2: movwgt r0, #357
%0 = icmp sgt i32 %c, 1
@@ -40,9 +40,22 @@
; ARM: moveq r0, #1
; T2: t3:
-; T2: mov r0, #0
+; T2: mov.w r0, #0
; T2: moveq r0, #1
%0 = icmp eq i32 %a, 160
%1 = zext i1 %0 to i32
ret i32 %1
}
+
+define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind {
+entry:
+; ARM: t4:
+; ARM: ldr
+; ARM: movlt
+
+; T2: t4:
+; T2: mvnlt.w r0, #11141290
+ %0 = icmp slt i32 %a, %b
+ %1 = select i1 %0, i32 4283826005, i32 %x
+ ret i32 %1
+}
More information about the llvm-commits
mailing list