[llvm-commits] [llvm] r118429 - in /llvm/trunk: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMBuildAttrs.h test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll

Dale Johannesen dalej at apple.com
Mon Nov 8 11:17:22 PST 2010


Author: johannes
Date: Mon Nov  8 13:17:22 2010
New Revision: 118429

URL: http://llvm.org/viewvc/llvm-project?rev=118429&view=rev
Log:
Revert 118422 in search of bot verdancy.


Modified:
    llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
    llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
    llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll

Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=118429&r1=118428&r2=118429&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Nov  8 13:17:22 2010
@@ -74,7 +74,6 @@
   public:
     virtual void MaybeSwitchVendor(StringRef Vendor) = 0;
     virtual void EmitAttribute(unsigned Attribute, unsigned Value) = 0;
-    virtual void EmitTextAttribute(unsigned Attribute, StringRef String) = 0;
     virtual void Finish() = 0;
     virtual ~AttributeEmitter() {}
   };
@@ -91,10 +90,6 @@
                            Twine(Attribute) + ", " + Twine(Value));
     }
 
-    void EmitTextAttribute(unsigned Attribute, StringRef String) {
-      assert(0 && "Unsupported use of text attribute");
-    }
-
     void Finish() { }
   };
 
@@ -128,12 +123,6 @@
       Contents += Value;
     }
 
-    void EmitTextAttribute(unsigned Attribute, StringRef String) {
-      Contents += Attribute;
-      Contents += String;
-      Contents += 0;
-    }
-
     void Finish() {
       const size_t ContentsSize = Contents.size();
 
@@ -609,51 +598,28 @@
     if (CPUString != "generic")
       OutStreamer.EmitRawText(StringRef("\t.cpu ") + CPUString);
   } else {
-    if (CPUString != "generic") {
-      if (CPUString == "cortex-a8") {
-        AttrEmitter->EmitTextAttribute(ARMBuildAttrs::CPU_name, "CORTEX-A8");
-        AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v7);
-        AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch_profile,
-                                   ARMBuildAttrs::ApplicationProfile);
-        AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
-                                   ARMBuildAttrs::Allowed);
-        AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
-                                   ARMBuildAttrs::AllowThumb32);
-        // Fixme: figure out when this is emitted.
-        //AttrEmitter->EmitAttribute(ARMBuildAttrs::WMMX_arch,
-        //                           ARMBuildAttrs::AllowWMMXv1);
-      }
-    } else {
-      // FIXME: Why these defaults?
-      AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
-      AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use,
-                                 ARMBuildAttrs::Allowed);
-      AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use,
-                                 ARMBuildAttrs::Allowed);
-    }
+    assert(CPUString == "generic" && "Unsupported .cpu attribute for ELF/.o");
+    // FIXME: Why these defaults?
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::CPU_arch, ARMBuildAttrs::v4T);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::ARM_ISA_use, 1);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::THUMB_ISA_use, 1);
   }
 
   // FIXME: Emit FPU type
   if (Subtarget->hasVFP2())
-    AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch,
-                               ARMBuildAttrs::AllowFPv2);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::VFP_arch, 2);
 
   // Signal various FP modes.
   if (!UnsafeFPMath) {
-    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal,
-                               ARMBuildAttrs::Allowed);
-    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions,
-                               ARMBuildAttrs::Allowed);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_denormal, 1);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_exceptions, 1);
   }
 
   if (NoInfsFPMath && NoNaNsFPMath)
-    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
-                               ARMBuildAttrs::Allowed);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 1);
   else
-    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model,
-                               ARMBuildAttrs::AllowIEE754);
+    AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_FP_number_model, 3);
 
-  // FIXME: add more flags to ARMBuildAttrs.h
   // 8-bytes alignment stuff.
   AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_needed, 1);
   AttrEmitter->EmitAttribute(ARMBuildAttrs::ABI_align8_preserved, 1);

Modified: llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h?rev=118429&r1=118428&r2=118429&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBuildAttrs.h Mon Nov  8 13:17:22 2010
@@ -92,40 +92,6 @@
     v7E_M    = 13   // v7_M with DSP extensions
   };
 
-  enum CPUArchProfile { // (=7), uleb128 
-    Not_Applicable = 0, // pre v7, or cross-profile code
-    ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
-    RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
-    MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
-    SystemProfile = (0x53) // 'S' Application or real-time profile
-  };
-
-  // The following have a lot of common use cases
-  enum { 
-    //ARMISAUse (=8), uleb128  and THUMBISAUse (=9), uleb128
-    Not_Allowed = 0,
-    Allowed = 1,
-
-    // FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
-    AllowFPv2  = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
-    AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
-    AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 
-    AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 
-    AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
-
-    // Tag_WMMX_arch, (=11), uleb128
-    AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
-    
-    // Tag_WMMX_arch, (=11), uleb128
-    AllowWMMXv1 = 2,  // The user permitted this entity to use WMMX v2
-
-    // Tag_ABI_FP_denormal, (=20), uleb128 
-    PreserveFPSign = 2, // sign when flushed-to-zero is preserved
-
-    // Tag_ABI_FP_number_model, (=23), uleb128
-    AllowRTABI = 2,  // numbers, infinities, and one quiet NaN (see [RTABI])
-    AllowIEE754 = 3 // this code to use all the IEEE 754-defined FP encodings
-  };
 }
 
 #endif // __TARGET_ARMBUILDATTRS_H__

Modified: llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll?rev=118429&r1=118428&r2=118429&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll Mon Nov  8 13:17:22 2010
@@ -1,35 +1,18 @@
 ; RUN: llc  %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \
-; RUN:    elf-dump --dump-section-data | FileCheck  -check-prefix=BASIC %s 
-; RUN: llc  %s -march=arm -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 \
-; RUN:    -arm-reserve-r9 -arm-use-movt -filetype=obj -o - | \
-; RUN:    elf-dump --dump-section-data | FileCheck  -check-prefix=CORTEXA8 %s
-
-
+; RUN:    elf-dump --dump-section-data | FileCheck %s
 ; This tests that the extpected ARM attributes are emitted.
 ;
-; BASIC:        .ARM.attributes
-; BASIC-NEXT:         0x70000003
-; BASIC-NEXT:         0x00000000
-; BASIC-NEXT:         0x00000000
-; BASIC-NEXT:         0x0000003c
-; BASIC-NEXT:         0x00000022
-; BASIC-NEXT:         0x00000000
-; BASIC-NEXT:         0x00000000
-; BASIC-NEXT:         0x00000001
-; BASIC-NEXT:         0x00000000
-; BASIC-NEXT:         '41210000 00616561 62690001 17000000 06020801 09011401 15011703 18011901 2c01'
-
-; CORTEXA8:        .ARM.attributes
-; CORTEXA8-NEXT:         0x70000003
-; CORTEXA8-NEXT:         0x00000000
-; CORTEXA8-NEXT:         0x00000000
-; CORTEXA8-NEXT:         0x0000003c
-; CORTEXA8-NEXT:         0x00000031
-; CORTEXA8-NEXT:         0x00000000
-; CORTEXA8-NEXT:         0x00000000
-; CORTEXA8-NEXT:         0x00000001
-; CORTEXA8-NEXT:         0x00000000
-; CORTEXA8-NEXT:         '41300000 00616561 62690001 26000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 0119012c 01'
+; CHECK:        .ARM.attributes
+; CHECK-NEXT:         0x70000003
+; CHECK-NEXT:         0x00000000
+; CHECK-NEXT:         0x00000000
+; CHECK-NEXT:         0x0000003c
+; CHECK-NEXT:         0x00000022
+; CHECK-NEXT:         0x00000000
+; CHECK-NEXT:         0x00000000
+; CHECK-NEXT:         0x00000001
+; CHECK-NEXT:         0x00000000
+; CHECK-NEXT:         '41210000 00616561 62690001 17000000 06020801 09011401 15011703 18011901 2c01'
 
 define i32 @f(i64 %z) {
        ret i32 0





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