[llvm-commits] [llvm] r118331 - in /llvm/trunk/lib/Target/X86: AsmParser/X86AsmParser.cpp X86InstrInfo.td

[Chris Lattner]

Author: lattner
Date: Sat Nov  6 02:34:58 2010
New Revision: 118331

URL: http://llvm.org/viewvc/llvm-project?rev=118331&view=rev
Log:
move the "movsd -> movsl" alias to the .td files, 
tidy up the movsx and movzx aliases.

Modified:
    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=118331&r1=118330&r2=118331&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Sat Nov  6 02:34:58 2010
@@ -969,12 +969,6 @@
                                           NameLoc);
   }
 
-  // movsd -> movsl (when no operands are specified).
-  if (Name == "movsd" && Operands.size() == 1) {
-    delete Operands[0];
-    Operands[0] = X86Operand::CreateToken("movsl", NameLoc);
-  }
-
   // fstp <mem> -> fstps <mem>.  Without this, we'll default to fstpl due to
   // suffix searching.
   if (Name == "fstp" && Operands.size() == 2 &&

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=118331&r1=118330&r2=118331&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Sat Nov  6 02:34:58 2010
@@ -1370,6 +1370,10 @@
 // Assembler Instruction Aliases
 //===----------------------------------------------------------------------===//
 
+// movsd with no operands (as opposed to the SSE scalar move of a double) is an
+// alias for movsl. (as in rep; movsd)
+def : InstAlias<"movsd", (MOVSD)>;
+
 // clr aliases.
 def : InstAlias<"clrb $reg", (XOR8rr  GR8 :$reg, GR8 :$reg)>;
 def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>;
@@ -1377,38 +1381,21 @@
 def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>;
 
 // movsx aliases
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX16rr8W GR16:$dst, GR8:$src)>;
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX16rm8W GR16:$dst, i8mem:$src)>;
-
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX32rr8 GR32:$dst, GR8:$src)>;
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX32rr16 GR32:$dst, GR16:$src)>;
-
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX64rr8 GR64:$dst, GR8:$src)>;
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX64rr16 GR64:$dst, GR16:$src)>;
-def : InstAlias<"movsx $src, $dst",
-                (MOVSX64rr32 GR64:$dst, GR32:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX16rm8W GR16:$dst, i8mem:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX32rr8 GR32:$dst, GR8:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX32rr16 GR32:$dst, GR16:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX64rr8 GR64:$dst, GR8:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX64rr16 GR64:$dst, GR16:$src)>;
+def : InstAlias<"movsx $src, $dst", (MOVSX64rr32 GR64:$dst, GR32:$src)>;
 
 // movzx aliases
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX16rr8W GR16:$dst, GR8:$src)>;
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX16rm8W GR16:$dst, i8mem:$src)>;
-
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX32rr8 GR32:$dst, GR8:$src)>;
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX32rr16 GR32:$dst, GR16:$src)>;
-
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
-def : InstAlias<"movzx $src, $dst",
-                (MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX16rr8W GR16:$dst, GR8:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX16rm8W GR16:$dst, i8mem:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX32rr8 GR32:$dst, GR8:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX32rr16 GR32:$dst, GR16:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX64rr8_Q GR64:$dst, GR8:$src)>;
+def : InstAlias<"movzx $src, $dst", (MOVZX64rr16_Q GR64:$dst, GR16:$src)>;
 // Note: No GR32->GR64 movzx form.