[llvm-commits] [llvm] r118125 - in /llvm/trunk/lib/Target/MBlaze: MBlazeInstrFPU.td MBlazeInstrFormats.td MBlazeInstrInfo.td

[Chris Lattner]

Author: lattner
Date: Tue Nov  2 18:57:05 2010
New Revision: 118125

URL: http://llvm.org/viewvc/llvm-project?rev=118125&view=rev
Log:
per a suggestion by Frits van Bommel, mark all MBlaze Pseudo 
instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.

Modified:
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
    llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td?rev=118125&r1=118124&r2=118125&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFPU.td Tue Nov  2 18:57:05 2010
@@ -124,7 +124,7 @@
 }
 
 
-let usesCustomInserter = 1, isCodeGenOnly = 1 in {
+let usesCustomInserter = 1 in {
   def Select_FCC : MBlazePseudo<(outs GPR:$dst),
     (ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
     "; SELECT_FCC PSEUDO!",

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td?rev=118125&r1=118124&r2=118125&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrFormats.td Tue Nov  2 18:57:05 2010
@@ -49,8 +49,7 @@
 
 // Generic MBlaze Format
 class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, 
-                 list<dag> pattern, InstrItinClass itin> : Instruction 
-{
+                 list<dag> pattern, InstrItinClass itin> : Instruction {
   let Namespace = "MBlaze";
   field bits<32> Inst;
 
@@ -61,6 +60,10 @@
   // Top 6 bits are the 'opcode' field
   let Inst{0-5} = opcode;   
   
+  // If the instruction is marked as a pseudo, set isCodeGenOnly so that the
+  // assembler and disassmbler ignore it.
+  let isCodeGenOnly = !eq(!cast<string>(form), "FPseudo");
+  
   dag OutOperandList = outs;
   dag InOperandList  = ins;
 

Modified: llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td?rev=118125&r1=118124&r2=118125&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeInstrInfo.td Tue Nov  2 18:57:05 2010
@@ -125,7 +125,7 @@
 //===----------------------------------------------------------------------===//
 
 // As stack alignment is always done with addiu, we need a 16-bit immediate
-let Defs = [R1], Uses = [R1], isCodeGenOnly = 1 in {
+let Defs = [R1], Uses = [R1] in {
 def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt),
                                   "#ADJCALLSTACKDOWN $amt",
                                   [(callseq_start timm:$amt)]>;
@@ -526,7 +526,7 @@
   def NOP :  MBlazeInst< 0x20, FC, (outs), (ins), "nop    ", [], IIAlu>;
 }
 
-let usesCustomInserter = 1, isCodeGenOnly = 1 in {
+let usesCustomInserter = 1 in {
   def Select_CC : MBlazePseudo<(outs GPR:$dst),
     (ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
     "; SELECT_CC PSEUDO!",