[llvm-commits] [llvm] r118093 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrInfo.td ARMMCCodeEmitter.cpp

[Owen Anderson]

Author: resistor
Date: Tue Nov  2 17:28:01 2010
New Revision: 118093

URL: http://llvm.org/viewvc/llvm-project?rev=118093&view=rev
Log:
Rename encoder methods to match naming convention.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=118093&r1=118092&r2=118093&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue Nov  2 17:28:01 2010
@@ -101,9 +101,6 @@
                                     unsigned OpIdx);
 
     unsigned getMachineSoImmOpValue(unsigned SoImm);
-    unsigned getAddrMode6RegisterOperand(const MachineInstr &MI);
-    unsigned getAddrMode6OffsetOperand(const MachineInstr &MI);
-    
     unsigned getAddrModeSBit(const MachineInstr &MI,
                              const TargetInstrDesc &TID) const;
 
@@ -174,9 +171,9 @@
       const { return 0; }
     unsigned getImmMinusOneOpValue(const MachineInstr &MI, unsigned Op)
       const { return 0; }
-    unsigned getAddrMode6RegisterOperand(const MachineInstr &MI, unsigned Op)
+    unsigned getAddrMode6AddressOpValue(const MachineInstr &MI, unsigned Op)
       const { return 0; }
-    unsigned getAddrMode6OffsetOperand(const MachineInstr &MI, unsigned Op)
+    unsigned getAddrMode6OffsetOpValue(const MachineInstr &MI, unsigned Op)
       const { return 0; }
     unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI,
                                             unsigned Op) const { return 0; }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=118093&r1=118092&r2=118093&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Nov  2 17:28:01 2010
@@ -472,13 +472,13 @@
                 ComplexPattern<i32, 2, "SelectAddrMode6", [], [SDNPWantParent]>{
   let PrintMethod = "printAddrMode6Operand";
   let MIOperandInfo = (ops GPR:$addr, i32imm);
-  string EncoderMethod = "getAddrMode6RegisterOperand";
+  string EncoderMethod = "getAddrMode6AddressOpValue";
 }
 
 def am6offset : Operand<i32> {
   let PrintMethod = "printAddrMode6OffsetOperand";
   let MIOperandInfo = (ops GPR);
-  string EncoderMethod = "getAddrMode6OffsetOperand";
+  string EncoderMethod = "getAddrMode6OffsetOpValue";
 }
 
 // addrmodepc := pc + reg

Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=118093&r1=118092&r2=118093&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Tue Nov  2 17:28:01 2010
@@ -99,8 +99,8 @@
   unsigned getBitfieldInvertedMaskOpValue(const MCInst &MI, unsigned Op) const;
 
   unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op) const;
-  unsigned getAddrMode6RegisterOperand(const MCInst &MI, unsigned Op) const;
-  unsigned getAddrMode6OffsetOperand(const MCInst &MI, unsigned Op) const;
+  unsigned getAddrMode6AddressOpValue(const MCInst &MI, unsigned Op) const;
+  unsigned getAddrMode6OffsetOpValue(const MCInst &MI, unsigned Op) const;
 
   unsigned getNumFixupKinds() const {
     assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented.");
@@ -297,7 +297,7 @@
   return Binary;
 }
 
-unsigned ARMMCCodeEmitter::getAddrMode6RegisterOperand(const MCInst &MI,
+unsigned ARMMCCodeEmitter::getAddrMode6AddressOpValue(const MCInst &MI,
                                                       unsigned Op) const {
   const MCOperand &Reg = MI.getOperand(Op);
   const MCOperand &Imm = MI.getOperand(Op+1);
@@ -313,7 +313,7 @@
   return RegNo | (Align << 4);
 }
 
-unsigned ARMMCCodeEmitter::getAddrMode6OffsetOperand(const MCInst &MI,
+unsigned ARMMCCodeEmitter::getAddrMode6OffsetOpValue(const MCInst &MI,
                                                      unsigned Op) const {
   const MCOperand &regno = MI.getOperand(Op);
   if (regno.getReg() == 0) return 0x0D;