[llvm-commits] [llvm] r117953 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineShifts.cpp test/Transforms/InstCombine/2010-11-01-lshr-mask.ll

[Owen Anderson]

Author: resistor
Date: Mon Nov  1 16:08:20 2010
New Revision: 117953

URL: http://llvm.org/viewvc/llvm-project?rev=117953&view=rev
Log:
When folding away a (shl (shr)) pair, we need to check that the bits that will BECOME the low
bits are zero, not that the current low bits are zero.  Fixes <rdar://problem/8606771>.

Added:
    llvm/trunk/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll
Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=117953&r1=117952&r2=117953&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Mon Nov  1 16:08:20 2010
@@ -157,7 +157,7 @@
     if (CI->getZExtValue() > NumBits) {
       unsigned LowBits = CI->getZExtValue() - NumBits;
       if (MaskedValueIsZero(I->getOperand(0),
-                            APInt::getLowBitsSet(TypeWidth, LowBits)))
+                          APInt::getLowBitsSet(TypeWidth, LowBits) << NumBits))
         return true;
     }
       

Added: llvm/trunk/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll?rev=117953&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll Mon Nov  1 16:08:20 2010
@@ -0,0 +1,20 @@
+; RUN: opt -instcombine -S < %s | FileCheck %s
+; <rdar://problem/8606771>
+
+define i32 @main(i32 %argc) nounwind ssp {
+entry:
+  %tmp3151 = trunc i32 %argc to i8
+  %tmp3161 = or i8 %tmp3151, -17
+  %tmp3162 = and i8 %tmp3151, 122
+  %tmp3163 = xor i8 %tmp3162, -17
+  %tmp4114 = shl i8 %tmp3163, 6
+  %tmp4115 = xor i8 %tmp4114, %tmp3163
+  %tmp4120 = xor i8 %tmp3161, %tmp4115
+; CHECK: lshr i8 %tmp4115, 1
+; CHECK-NOT: shl i8 %tmp4126, 6
+  %tmp4126 = lshr i8 %tmp4120, 7
+  %tmp4127 = mul i8 %tmp4126, 64
+  %tmp4086 = zext i8 %tmp4127 to i32
+; CHECK: ret i32
+  ret i32 %tmp4086
+}