[llvm-commits] [llvm] r117753 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrFormats.td ARMInstrInfo.td ARMMCCodeEmitter.cpp

[Chris Lattner]

On Oct 29, 2010, at 5:37 PM, Jim Grosbach wrote:

> Author: grosbach
> Date: Fri Oct 29 19:37:59 2010
> New Revision: 117753
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=117753&view=rev
> Log:
> Encode the register list operands for ARM mode LDM/STM instructions.

Thanks Jim,

> +unsigned ARMMCCodeEmitter::getRegisterListOpValue(const MCInst &MI,
> +                                                  unsigned Op) const {
> +  // Convert a list of GPRs into a bitfield (R0 -> bit 0). For each
> +  // register in the list, set the corresponding bit.
> +  unsigned Binary = 0;
> +  for (unsigned i = Op; i < MI.getNumOperands(); ++i) {

No need to evaluate 'MI.getNumOperands()' every time through the loop.

-Chris

> +    unsigned regno = getARMRegisterNumbering(MI.getOperand(i).getReg());
> +    Binary |= 1 << regno;
> +  }
> +  return Binary;
> +}
> +
> void ARMMCCodeEmitter::
> EncodeInstruction(const MCInst &MI, raw_ostream &OS,
>                   SmallVectorImpl<MCFixup> &Fixups) const {
> 
> 
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