[llvm-commits] [llvm] r117740 - /llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
Jim Grosbach
grosbach at apple.com
Fri Oct 29 16:21:03 PDT 2010
Author: grosbach
Date: Fri Oct 29 18:21:03 2010
New Revision: 117740
URL: http://llvm.org/viewvc/llvm-project?rev=117740&view=rev
Log:
trailing whitespace
Modified:
llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=117740&r1=117739&r2=117740&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Fri Oct 29 18:21:03 2010
@@ -91,7 +91,7 @@
unsigned getImmMinusOneOpValue(const MCInst &MI, unsigned Op) const {
return MI.getOperand(Op).getImm() - 1;
}
-
+
unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op) const {
return 64 - MI.getOperand(Op).getImm();
}
@@ -154,7 +154,7 @@
const MCOperand &MO) const {
if (MO.isReg()) {
unsigned regno = getARMRegisterNumbering(MO.getReg());
-
+
// Q registers are encodes as 2x their register number.
switch (MO.getReg()) {
case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3:
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