[llvm-commits] [llvm] r117606 - in /llvm/trunk: test/MC/ARM/arm_instructions.s utils/TableGen/AsmMatcherEmitter.cpp
Chris Lattner
sabre at nondot.org
Thu Oct 28 14:28:43 PDT 2010
Author: lattner
Date: Thu Oct 28 16:28:42 2010
New Revision: 117606
URL: http://llvm.org/viewvc/llvm-project?rev=117606&view=rev
Log:
fix the asmmatcher generator to handle targets with no RegisterPrefix
(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
Modified:
llvm/trunk/test/MC/ARM/arm_instructions.s
llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
Modified: llvm/trunk/test/MC/ARM/arm_instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm_instructions.s?rev=117606&r1=117605&r2=117606&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/arm_instructions.s (original)
+++ llvm/trunk/test/MC/ARM/arm_instructions.s Thu Oct 28 16:28:42 2010
@@ -1,8 +1,13 @@
-@ RUN: llvm-mc -triple arm-unknown-unknown %s | FileCheck %s
+@ RUN: llvm-mc -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
@ CHECK: nop
+@ CHECK: encoding: [0x00,0xf0,0x20,0xe3]
nop
@ CHECK: nopeq
+@ CHECK: encoding: [0x00,0xf0,0x20,0x03]
nopeq
+@ CHECK: bx lr
+@ CHECK: encoding: [0x1e,0xff,0x2f,0xe1]
+bx lr
Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=117606&r1=117605&r2=117606&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Thu Oct 28 16:28:42 2010
@@ -941,21 +941,25 @@
continue;
// Collect singleton registers, if used.
- if (!RegisterPrefix.empty()) {
- for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
- if (II->Tokens[i].startswith(RegisterPrefix)) {
- StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
- Record *Rec = getRegisterRecord(Target, RegName);
-
- if (!Rec) {
- std::string Err = "unable to find register for '" + RegName.str() +
- "' (which matches register prefix)";
- throw TGError(CGI.TheDef->getLoc(), Err);
- }
-
- SingletonRegisterNames.insert(RegName);
- }
+ for (unsigned i = 0, e = II->Tokens.size(); i != e; ++i) {
+ if (!II->Tokens[i].startswith(RegisterPrefix))
+ continue;
+
+ StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
+ Record *Rec = getRegisterRecord(Target, RegName);
+
+ if (!Rec) {
+ // If there is no register prefix (i.e. "%" in "%eax"), then this may
+ // be some random non-register token, just ignore it.
+ if (RegisterPrefix.empty())
+ continue;
+
+ std::string Err = "unable to find register for '" + RegName.str() +
+ "' (which matches register prefix)";
+ throw TGError(CGI.TheDef->getLoc(), Err);
}
+
+ SingletonRegisterNames.insert(RegName);
}
// Compute the require features.
@@ -1008,15 +1012,23 @@
StringRef Token = II->Tokens[i];
// Check for singleton registers.
- if (!RegisterPrefix.empty() && Token.startswith(RegisterPrefix)) {
+ if (Token.startswith(RegisterPrefix)) {
StringRef RegName = II->Tokens[i].substr(RegisterPrefix.size());
- InstructionInfo::Operand Op;
- Op.Class = RegisterClasses[getRegisterRecord(Target, RegName)];
- Op.OperandInfo = 0;
- assert(Op.Class && Op.Class->Registers.size() == 1 &&
- "Unexpected class for singleton register");
- II->Operands.push_back(Op);
- continue;
+ if (Record *RegRecord = getRegisterRecord(Target, RegName)) {
+ InstructionInfo::Operand Op;
+ Op.Class = RegisterClasses[RegRecord];
+ Op.OperandInfo = 0;
+ assert(Op.Class && Op.Class->Registers.size() == 1 &&
+ "Unexpected class for singleton register");
+ II->Operands.push_back(Op);
+ continue;
+ }
+
+ if (!RegisterPrefix.empty()) {
+ std::string Err = "unable to find register for '" + RegName.str() +
+ "' (which matches register prefix)";
+ throw TGError(II->Instr->TheDef->getLoc(), Err);
+ }
}
// Check for simple tokens.
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