[llvm-commits] [llvm] r117478 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrInfo.td

[Jim Grosbach]

Author: grosbach
Date: Wed Oct 27 14:55:59 2010
New Revision: 117478

URL: http://llvm.org/viewvc/llvm-project?rev=117478&view=rev
Log:
ARM JIT fix for LDRi12 and company.

Modified:
    llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=117478&r1=117477&r2=117478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Oct 27 14:55:59 2010
@@ -175,7 +175,21 @@
     unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI,
                                             unsigned Op) const { return 0; }
     unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op)
-      const { return 0; }
+      const {
+        // {17-13} = reg
+        // {12}    = (U)nsigned (add == '1', sub == '0')
+        // {11-0}  = imm12
+        const MachineOperand &MO  = MI.getOperand(Op);
+        const MachineOperand &MO1 = MI.getOperand(Op + 1);
+        unsigned Reg = getARMRegisterNumbering(MO.getReg());
+        int32_t Imm12 = MO1.getImm();
+        uint32_t Binary;
+        Binary = Imm12 & 0xfff;
+        if (Imm12 >= 0)
+          Binary |= (1 << 12);
+        Binary |= (Reg << 13);
+        return Binary;
+      }
 
     /// getMovi32Value - Return binary encoding of operand for movw/movt. If the
     /// machine operand requires relocation, record the relocation and return
@@ -946,9 +960,8 @@
   // Part of binary is determined by TableGn.
   unsigned Binary = getBinaryCodeForInstr(MI);
 
-  // If this is an LDRi12, LDRrs, or LDRcp, nothing more needs be done.
-  if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRrs
-      || MI.getOpcode() == ARM::LDRcp) {
+  // If this is an LDRi12 or LDRcp, nothing more needs be done.
+  if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRcp) {
     emitWordLE(Binary);
     return;
   }

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=117478&r1=117477&r2=117478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Oct 27 14:55:59 2010
@@ -397,6 +397,7 @@
 def ldst_so_reg : Operand<i32>,
                   ComplexPattern<i32, 3, "SelectLdStSOReg", []> {
   // FIXME: Simplify the printer
+  // FIXME: Add EncoderMethod for this addressing mode
   let PrintMethod = "printAddrMode2Operand";
   let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
 }