[llvm-commits] [llvm] r117461 - /llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
Jim Grosbach
grosbach at apple.com
Wed Oct 27 10:52:51 PDT 2010
Author: grosbach
Date: Wed Oct 27 12:52:51 2010
New Revision: 117461
URL: http://llvm.org/viewvc/llvm-project?rev=117461&view=rev
Log:
The new LDR* instruction patterns should handle the necessary encoding of
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.
Modified:
llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=117461&r1=117460&r2=117461&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Wed Oct 27 12:52:51 2010
@@ -946,6 +946,13 @@
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
+ // If this is an LDRi12, LDRrs, or LDRcp, nothing more needs be done.
+ if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRrs
+ || MI.getOpcode() == ARM::LDRcp) {
+ emitWordLE(Binary);
+ return;
+ }
+
// Set the conditional execution predicate
Binary |= II->getPredicate(&MI) << ARMII::CondShift;
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