[llvm-commits] [llvm] r117408 - in /llvm/trunk/lib/CodeGen: LiveRangeEdit.h SplitKit.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Tue Oct 26 17:36:09 2010
New Revision: 117408

URL: http://llvm.org/viewvc/llvm-project?rev=117408&view=rev
Log:
After splitting, compute connected components of all new registers, not just for
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

Modified:
    llvm/trunk/lib/CodeGen/LiveRangeEdit.h
    llvm/trunk/lib/CodeGen/SplitKit.cpp

Modified: llvm/trunk/lib/CodeGen/LiveRangeEdit.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeEdit.h?rev=117408&r1=117407&r2=117408&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveRangeEdit.h (original)
+++ llvm/trunk/lib/CodeGen/LiveRangeEdit.h Tue Oct 26 17:36:09 2010
@@ -77,6 +77,8 @@
   typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
   iterator begin() const { return newRegs_.begin()+firstNew_; }
   iterator end() const { return newRegs_.end(); }
+  unsigned size() const { return newRegs_.size()-firstNew_; }
+  LiveInterval *get(unsigned idx) const { return newRegs_[idx-firstNew_]; }
 
   /// assignStackSlot - Ensure a stack slot is assigned to parent.
   /// @return the assigned stack slot number.

Modified: llvm/trunk/lib/CodeGen/SplitKit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SplitKit.cpp?rev=117408&r1=117407&r2=117408&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SplitKit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SplitKit.cpp Tue Oct 26 17:36:09 2010
@@ -842,26 +842,27 @@
   for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I)
     (*I)->RenumberValues(lis_);
 
-  // Now check if dupli was separated into multiple connected components.
-  ConnectedVNInfoEqClasses ConEQ(lis_);
-  if (unsigned NumComp = ConEQ.Classify(dupli_.getLI())) {
-    DEBUG(dbgs() << "  Remainder has " << NumComp << " connected components: "
-                 << *dupli_.getLI() << '\n');
-    // Did the remainder break up? Create intervals for all the components.
-    if (NumComp > 1) {
-      SmallVector<LiveInterval*, 8> dups;
-      dups.push_back(dupli_.getLI());
-      for (unsigned i = 1; i != NumComp; ++i)
-        dups.push_back(&edit_.create(mri_, lis_, vrm_));
-      ConEQ.Distribute(&dups[0]);
-      // Rewrite uses to the new regs.
-      rewrite(dupli_.getLI()->reg);
-    }
-  }
-
   // Rewrite instructions.
   rewrite(edit_.getReg());
 
+  // Now check if any registers were separated into multiple components.
+  ConnectedVNInfoEqClasses ConEQ(lis_);
+  for (unsigned i = 0, e = edit_.size(); i != e; ++i) {
+    // Don't use iterators, they are invalidated by create() below.
+    LiveInterval *li = edit_.get(i);
+    unsigned NumComp = ConEQ.Classify(li);
+    if (NumComp <= 1)
+      continue;
+    DEBUG(dbgs() << "  " << NumComp << " components: " << *li << '\n');
+    SmallVector<LiveInterval*, 8> dups;
+    dups.push_back(li);
+    for (unsigned i = 1; i != NumComp; ++i)
+      dups.push_back(&edit_.create(mri_, lis_, vrm_));
+    ConEQ.Distribute(&dups[0]);
+    // Rewrite uses to the new regs.
+    rewrite(li->reg);
+  }
+
   // Calculate spill weight and allocation hints for new intervals.
   VirtRegAuxInfo vrai(vrm_.getMachineFunction(), lis_, sa_.loops_);
   for (LiveRangeEdit::iterator I = edit_.begin(), E = edit_.end(); I != E; ++I){