[llvm-commits] [patch] Add relaxations for arithmetic instructions

[Rafael Espíndola]

Some time ago I added a relaxation for ADD32ri8 which was needed for
x86. I decided to extend it to cover the remaining arithmetic
instructions. In doing so I found that the previous patch might have
introduced a bug as I am not sure exactly when a instruction
"MayNeedRelaxation" with RIP relative addressing.

The attached patch implements the remaining arithmetic instructions
and should fix ADD32ri8 being relaxed when using RIP relative
addressing.

Is the avoidance of relaxations for RIP addressing a MachO only thing?
With this patch we assemble

 zed:
_foo:
        nop
        cmpq $zed, _foo at GOTPCREL(%rip)

to
   0:	90                   	nop
   1:	48 83 3d f7 ff ff ff 	cmpq   $0x0,-0x9(%rip)        # 0 <_foo>
   8:	00

gnu as does
   0:	90                   	nop
   1:	48 81 3d f4 ff ff ff 	cmpq   $0x0,-0xc(%rip)        # 0 <_foo>
   8:	00 00 00 00

Changing the return from "hasExp && !hasRIP" to just "hasExp" makes us
produce the same output as gnu as, but breaks some of the MachO tests
in "make check-lit".

Cheers,
Rafael
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