[llvm-commits] [llvm] r115711 - /llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

[Eric Christopher]

Author: echristo
Date: Tue Oct  5 18:13:24 2010
New Revision: 115711

URL: http://llvm.org/viewvc/llvm-project?rev=115711&view=rev
Log:
Random cleanup and make the intermediate register in fptosi a
32-bit fp reg, not 64-bit.

Fixes SingleSource.

Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=115711&r1=115710&r2=115711&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Tue Oct  5 18:13:24 2010
@@ -979,8 +979,8 @@
   if (!Subtarget->hasVFP2()) return false;
 
   Value *V = I->getOperand(0);
-  if (!I->getType()->isFloatTy() ||
-      !V->getType()->isDoubleTy()) return false;
+  if (!(I->getType()->isFloatTy() &&
+        V->getType()->isDoubleTy())) return false;
 
   unsigned Op = getRegForValue(V);
   if (Op == 0) return false;
@@ -1007,7 +1007,7 @@
   
   // The conversion routine works on fp-reg to fp-reg and the operand above
   // was an integer, move it to the fp registers if possible.
-  unsigned FP = ARMMoveToFPReg(DstVT, Op);
+  unsigned FP = ARMMoveToFPReg(MVT::f32, Op);
   if (FP == 0) return false;
   
   unsigned Opc;
@@ -1040,9 +1040,9 @@
   if (OpTy->isFloatTy()) Opc = ARM::VTOSIZS;
   else if (OpTy->isDoubleTy()) Opc = ARM::VTOSIZD;
   else return 0;
-  EVT OpVT = TLI.getValueType(OpTy, true);
   
-  unsigned ResultReg = createResultReg(TLI.getRegClassFor(OpVT));
+  // f64->s32 or f32->s32 both need an intermediate f32 reg.
+  unsigned ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32));
   AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
                           ResultReg)
                   .addReg(Op));