[llvm-commits] [llvm] r115691 - /llvm/trunk/test/CodeGen/X86/mmx-builtins.ll

[Bill Wendling]

Author: void
Date: Tue Oct  5 16:58:12 2010
New Revision: 115691

URL: http://llvm.org/viewvc/llvm-project?rev=115691&view=rev
Log:
PSHUFW is in SSE, not SSSE3.

Modified:
    llvm/trunk/test/CodeGen/X86/mmx-builtins.ll

Modified: llvm/trunk/test/CodeGen/X86/mmx-builtins.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-builtins.ll?rev=115691&r1=115690&r2=115691&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-builtins.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-builtins.ll Tue Oct  5 16:58:12 2010
@@ -1028,14 +1028,14 @@
   ret i64 %5
 }
 
-declare x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx, i8) nounwind readnone
+declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8) nounwind readnone
 
 define i64 @test21(<1 x i64> %a) nounwind readnone optsize ssp {
 ; CHECK: pshufw
 entry:
   %0 = bitcast <1 x i64> %a to <4 x i16>
   %1 = bitcast <4 x i16> %0 to x86_mmx
-  %2 = tail call x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx %1, i8 3) nounwind readnone
+  %2 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %1, i8 3) nounwind readnone
   %3 = bitcast x86_mmx %2 to <4 x i16>
   %4 = bitcast <4 x i16> %3 to <1 x i64>
   %5 = extractelement <1 x i64> %4, i32 0