[llvm-commits] [llvm] r115476 - /llvm/trunk/test/CodeGen/X86/mmx-builtins.ll
Chris Lattner
sabre at nondot.org
Sun Oct 3 13:02:48 PDT 2010
Author: lattner
Date: Sun Oct 3 15:02:48 2010
New Revision: 115476
URL: http://llvm.org/viewvc/llvm-project?rev=115476&view=rev
Log:
unbreak buildbot
Modified:
llvm/trunk/test/CodeGen/X86/mmx-builtins.ll
Modified: llvm/trunk/test/CodeGen/X86/mmx-builtins.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-builtins.ll?rev=115476&r1=115475&r2=115476&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-builtins.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-builtins.ll Sun Oct 3 15:02:48 2010
@@ -1028,14 +1028,14 @@
ret i64 %5
}
-declare x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx, i32) nounwind readnone
+declare x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx, i8) nounwind readnone
define i64 @test21(<1 x i64> %a) nounwind readnone optsize ssp {
; CHECK: pshufw
entry:
%0 = bitcast <1 x i64> %a to <4 x i16>
%1 = bitcast <4 x i16> %0 to x86_mmx
- %2 = tail call x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx %1, i32 3) nounwind readnone
+ %2 = tail call x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx %1, i8 3) nounwind readnone
%3 = bitcast x86_mmx %2 to <4 x i16>
%4 = bitcast <4 x i16> %3 to <1 x i64>
%5 = extractelement <1 x i64> %4, i32 0
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