[llvm-commits] [llvm] r115291 - in /llvm/trunk/test/CodeGen/X86: 2009-06-05-ScalarToVectorByteMMX.ll fast-isel-bc.ll mmx-insert-element.ll mmx-punpckhdq.ll mmx-vzmovl-2.ll mmx-vzmovl.ll vec_insert-7.ll

[Dale Johannesen]

Author: johannes
Date: Thu Sep 30 23:17:55 2010
New Revision: 115291

URL: http://llvm.org/viewvc/llvm-project?rev=115291&view=rev
Log:
Mark all these as needing SSE2.  Should fix PPC and
maybe even Linux.


Modified:
    llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
    llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll
    llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll
    llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll
    llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll
    llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll
    llvm/trunk/test/CodeGen/X86/vec_insert-7.ll

Modified: llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll Thu Sep 30 23:17:55 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx | not grep movl
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | not grep movl
 
 define <8 x i8> @a(i8 zeroext %x) nounwind {
   %r = insertelement <8 x i8> undef, i8 %x, i32 0

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-bc.ll Thu Sep 30 23:17:55 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
 ; PR4684
 
 target datalayout =

Modified: llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-insert-element.ll Thu Sep 30 23:17:55 2010
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep movq
-; RUN: llc < %s -march=x86 -mattr=+mmx,+sse | grep pshufd
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
 ; This is not an MMX operation; promoted to XMM.
 
 define x86_mmx @qux(i32 %A) nounwind {

Modified: llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-punpckhdq.ll Thu Sep 30 23:17:55 2010
@@ -1,5 +1,5 @@
-; RRUN: llc < %s -march=x86 -mattr=+mmx | grep pextrd
-; RRUN: llc < %s -march=x86 -mattr=+mmx | grep punpckhdq | count 1
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pextrd
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep punpckhdq | count 1
 ; There are no MMX operations in bork; promoted to XMM.
 
 define void @bork(<1 x i64>* %x) {

Modified: llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-vzmovl-2.ll Thu Sep 30 23:17:55 2010
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep pxor
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep punpckldq
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep pxor
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep punpckldq
 
 	%struct.vS1024 = type { [8 x <4 x i32>] }
 	%struct.vS512 = type { [4 x <4 x i32>] }

Modified: llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-vzmovl.ll Thu Sep 30 23:17:55 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep movq | count 2
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | grep movq | count 2
 ; There are no MMX operations here; this is promoted to XMM.
 
 define void @foo(<1 x i64>* %a, <1 x i64>* %b) nounwind {

Modified: llvm/trunk/test/CodeGen/X86/vec_insert-7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-7.ll?rev=115291&r1=115290&r2=115291&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-7.ll Thu Sep 30 23:17:55 2010
@@ -1,4 +1,4 @@
-; RRUN: llc < %s -march=x86 -mattr=+mmx,+sse -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2
+; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 -o - | grep pinsrd | count 2
 ; MMX insertelement is not available; these are promoted to XMM.
 ; (Without SSE they are split to two ints, and the code is much better.)