[llvm-commits] [llvm] r114599 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/bit-test-shift.ll

[Chris Lattner]

On Sep 22, 2010, at 11:35 PM, Nick Lewycky wrote:

> Duncan Sands wrote:
>> Hi Owen,
>> 
>>> A select between a constant and zero, when fed by a bit test, can be efficiently
>>> lowered using a series of shifts.
>>> Fixes<rdar://problem/8285015>.
>> 
>> can't you do this at the IR level?  At the IR level, you can change
>> 
>>    %s = select i1 %cond, i32 %a, i32 0
>> 
>> into
>> 
>>    %cond.1 = sext i1 %cond to i32
>>    %s = and i32 %a, %cond.1
>> 
>> which could be a win depending on where %cond comes from.
> 
> I would much rather we turned chains of expressions on i1 into a single 
> statement, then taught the backend how to do efficient construction of 
> the right values out of the select statement.

Yes, I agree.  The canonical form at the IR level should be a select.

-Chris