[llvm-commits] [llvm] r114472 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp utils/TableGen/DAGISelMatcherEmitter.cpp

Chris Lattner sabre at nondot.org
Tue Sep 21 13:37:12 PDT 2010


Author: lattner
Date: Tue Sep 21 15:37:12 2010
New Revision: 114472

URL: http://llvm.org/viewvc/llvm-project?rev=114472&view=rev
Log:
just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=114472&r1=114471&r2=114472&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Tue Sep 21 15:37:12 2010
@@ -254,7 +254,8 @@
     return 0;
   }
   
-  virtual bool CheckComplexPattern(SDNode *Root, SDValue N, unsigned PatternNo,
+  virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
+                                   unsigned PatternNo,
                                    SmallVectorImpl<SDValue> &Result) {
     assert(0 && "Tblgen should generate the implementation of this!");
     return false;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=114472&r1=114471&r2=114472&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Sep 21 15:37:12 2010
@@ -2086,7 +2086,11 @@
       unsigned CPNum = MatcherTable[MatcherIndex++];
       unsigned RecNo = MatcherTable[MatcherIndex++];
       assert(RecNo < RecordedNodes.size() && "Invalid CheckComplexPat");
-      if (!CheckComplexPattern(NodeToMatch, RecordedNodes[RecNo], CPNum,
+      SDNode *Parent = 0;
+      if (NodeStack.size() > 1)
+        Parent = NodeStack[NodeStack.size()-2].getNode();
+      
+      if (!CheckComplexPattern(NodeToMatch, Parent, RecordedNodes[RecNo], CPNum,
                                RecordedNodes))
         break;
       continue;

Modified: llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp?rev=114472&r1=114471&r2=114472&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/DAGISelMatcherEmitter.cpp Tue Sep 21 15:37:12 2010
@@ -633,7 +633,7 @@
   // Emit CompletePattern matchers.
   // FIXME: This should be const.
   if (!ComplexPatterns.empty()) {
-    OS << "bool CheckComplexPattern(SDNode *Root, SDValue N,\n";
+    OS << "bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,\n";
     OS << "      unsigned PatternNo, SmallVectorImpl<SDValue> &Result) {\n";
     OS << "  unsigned NextRes = Result.size();\n";
     OS << "  switch (PatternNo) {\n";
@@ -655,6 +655,11 @@
       if (P.hasProperty(SDNPWantRoot))
         OS << "Root, ";
       
+      // If the complex pattern wants the parent of the operand being matched,
+      // pass it in as the next argument.
+      if (P.hasProperty(SDNPWantParent))
+        OS << "Parent, ";
+      
       OS << "N";
       for (unsigned i = 0; i != NumOps; ++i)
         OS << ", Result[NextRes+" << i << ']';





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