[llvm-commits] [llvm] r114348 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll

[Owen Anderson]

Author: resistor
Date: Mon Sep 20 15:39:59 2010
New Revision: 114348

URL: http://llvm.org/viewvc/llvm-project?rev=114348&view=rev
Log:
When TCO is turned on, it is possible to end up with aliasing FrameIndex's.  Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=114348&r1=114347&r2=114348&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Sep 20 15:39:59 2010
@@ -7030,8 +7030,19 @@
   if (Base1 == Base2 || (GV1 && (GV1 == GV2)) || (CV1 && (CV1 == CV2)))
     return !((Offset1 + Size1) <= Offset2 || (Offset2 + Size2) <= Offset1);
 
-  // If we know what the bases are, and they aren't identical, then we know they
-  // cannot alias.
+  // It is possible for different frame indices to alias each other, mostly
+  // when tail call optimization reuses return address slots for arguments.
+  // To catch this case, look up the actual index of frame indices to compute
+  // the real alias relationship.
+  if (isFrameIndex1 && isFrameIndex2) {
+    MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+    Offset1 += MFI->getObjectOffset(cast<FrameIndexSDNode>(Base1)->getIndex());
+    Offset2 += MFI->getObjectOffset(cast<FrameIndexSDNode>(Base2)->getIndex());
+    return !((Offset1 + Size1) <= Offset2 || (Offset2 + Size2) <= Offset1);
+  }
+
+  // Otherwise, if we know what the bases are, and they aren't identical, then 
+  // we know they cannot alias.
   if ((isFrameIndex1 || CV1 || GV1) && (isFrameIndex2 || CV2 || GV2))
     return false;
 

Modified: llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll?rev=114348&r1=114347&r2=114348&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll Mon Sep 20 15:39:59 2010
@@ -19,8 +19,8 @@
 }
 
 ; CHECK: movq	___stack_chk_guard at GOTPCREL(%rip), %rax
-; CHECK: movb	(%rsp), %dl
-; CHECK-NEXT: movb	30(%rsp), %sil
-; CHECK: movb	%dl, (%rsp)
-; CHECK-NEXT: movb	%sil, 30(%rsp)
+; CHECK: movb	30(%rsp), %dl
+; CHECK: movb	(%rsp), %sil
+; CHECK: movb	%sil, (%rsp)
+; CHECK: movb	%dl, 30(%rsp)
 ; CHECK: callq	___stack_chk_fail