[llvm-commits] [llvm] r113576 - in /llvm/trunk: lib/Target/ARM/ARMLoadStoreOptimizer.cpp test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll

[Bob Wilson]

On Sep 10, 2010, at 12:03 AM, Evan Cheng wrote:

> 
> On Sep 9, 2010, at 11:38 PM, Eric Christopher wrote:
> 
>> 
>> On Sep 9, 2010, at 10:15 PM, Bob Wilson wrote:
>> 
>>> to use AddrMode4, there was a count of the registers stored in one of the
>>> operands.  I changed that to just count the operands but forgot to adjust for
>>> the size of D registers.  This was noticed by Evan as a performance problem
>>> but it is a potential correctness bug as well, since it is possible that this
>>> could merge a base update with a non-matching immediate.
>>> 
>>> Modified:
>>>  llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>>>  llvm/trunk/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
>>> 
>>> Modified: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=113576&r1=113575&r2=113576&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
>>> +++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Fri Sep 10 00:15:04 2010
>>> @@ -458,9 +458,10 @@
>>> case ARM::t2STM:
>>> case ARM::VLDMS:
>>> case ARM::VSTMS:
>>> +    return (MI->getNumOperands() - 4) * 4;
>>> case ARM::VLDMD:
>>> case ARM::VSTMD:
>>> -    return (MI->getNumOperands() - 4) * 4;
>>> +    return (MI->getNumOperands() - 4) * 8;
>> 
>> Perhaps less magic numbers?
> 
> Right. It probably should replace 4 with MI->getDesc().getNumOperands()-1.

How would that work?  They're variadic instructions.